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HM62W1664HBLJP-25 PDF预览

HM62W1664HBLJP-25

更新时间: 2024-09-24 23:56:19
品牌 Logo 应用领域
其他 - ETC 内存集成电路静态存储器光电二极管
页数 文件大小 规格书
16页 120K
描述
x16 SRAM

HM62W1664HBLJP-25 数据手册

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HM62W1664HB Series  
1 M High Speed SRAM (64-kword × 16-bit)  
ADE-203-415B (Z)  
Rev. 2.0  
Nov. 1997  
Description  
The HM62W1664HB is an asynchronous high speed static RAM organized as 64-kword × 16-bit. It realize  
high speed access time (25/30 ns) with employing 0.8 µm CMOS process and high speed circuit designing  
technology. It is most appropriate for the application which requires high speed, high density memory and  
wide bit width configuration, such as cache and buffer memory in system. The HM62W1664HB is  
packaged in 400-mil 44-pin SOJ for high density surface mounting.  
Features  
Single 3.3 V supply (3.3 V ± 0.3V)  
Access time: 25/30 ns (max)  
Completely static memory  
No clock or timing strobe required  
Equal access and cycle times  
Directly LV-TTL compatible  
All inputs and outputs  
400-mil 44-pin SOJ package  
Center VCC and VSS type pinout  
Ordering Information  
Type No.  
Access time  
Package  
HM62W1664HBJP-25  
HM62W1664HBJP-30  
25 ns  
30 ns  
400-mil 44-pin plastic SOJ (CP-44D)  
HM62W1664HBLJP-25  
HM62W1664HBLJP-30  
25 ns  
30 ns  

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