Datasheet > HM5425801B

HM5425801B

更新时间： 2024-09-23 22:51:39

品牌	Logo	应用领域
尔必达 - ELPIDA		动态存储器双倍数据速率
页数	文件大小	规格书
65页	481K
描述
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank/ 16-Mword 】 4-bit 】 4-bank

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HM5425801B 数据手册

HM5425161B Series

HM5425801B Series

HM5425401B Series

256M SSTL_2 interface DDR SDRAM

143 MHz/133 MHz/125 MHz/100 MHz

4-Mword × 16-bit × 4-bank/8-Mword × 8-bit × 4-bank/

16-Mword × 4-bit × 4-bank

E0086H20 (Ver. 2.0)

Jan. 23, 2002

Description

The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM

devices. Read and write operations are performed at the cross points of the CLK and the CLK. This high

speed data transfer is realized by the 2-bit prefetch piplined architecture. Data strobe (DQS) both for read and

write are available for high speed and reliable data bus design. By setting extended mode resistor, the on-chip

Delay Locked Loop (DLL) can be set enable or disable.

Features

•

2.5 V power supply

SSTL-2 interface for all inputs and outputs

Clock frequency: 143 MHz/133 MHz/125 MHz/100 MHz (max)

Data inputs, outputs, and DM are synchronized with DQS

4 banks can operate simultaneously and independently

Burst read/write operation

Programmable burst length: 2/4/8

Burst read stop capability

Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.

12 3 4 5 6 7...65

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型号	品牌	获取价格	描述	数据表
HM5425801BTT-10	ELPIDA	获取价格	256M SSTL_2 interface DDR SDRAM 143 MHz/133 M
HM5425801BTT-75A	ELPIDA	获取价格	256M SSTL_2 interface DDR SDRAM 143 MHz/133 M
HM5425801BTT-75B	ELPIDA	获取价格	256M SSTL_2 interface DDR SDRAM 143 MHz/133 M
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