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HM52Y25165BTT-B6 PDF预览

HM52Y25165BTT-B6

更新时间: 2024-10-28 05:36:11
品牌 Logo 应用领域
尔必达 - ELPIDA 动态存储器
页数 文件大小 规格书
60页 347K
描述
256M SDRAM 100 MHz 4-Mword × 16-bit × 4-bank /16-Mword × 4-bit × 4-bank

HM52Y25165BTT-B6 数据手册

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HM52Y25165B-B6  
HM52Y25405B-B6  
256M SDRAM  
100 MHz  
4-Mword × 16-bit × 4-bank /16-Mword × 4-bit × 4-bank  
E0146H10 (Ver. 1.0)  
Preliminary  
May. 28, 2001  
Description  
The HM52Y25165B is a 256-Mbit SDRAM organized as 4194304-word × 16-bit × 4 bank. The  
HM52Y25405B is a 256-Mbit SDRAM organized as 16777216-word × 4-bit × 4 bank. All inputs and outputs  
are referred to the rising edge of the clock input. It is packaged in standard 54-pin plastic TSOP II.  
Features  
2.5 V power supply  
Clock frequency: 100MHz (max)  
Single pulsed RAS  
4 banks can operate simultaneously and independently  
Burst read/write operation and burst read/single write operation capability  
Programmable burst length: 1/2/4/8  
2 variations of burst sequence  
Sequential (BL = 1/2/4/8)  
Interleave (BL = 1/2/4/8)  
Programmable CAS latency: 2, 3  
Byte control by DQM : DQM (HM52Y25405B)  
: DQMU/DQML (HM52Y25165B)  
Refresh cycles: 8192 refresh cycles/64 ms  
2 variations of refresh  
Auto refresh  
Self refresh  
Preliminary: The Specifications of this device are subject to change without notice. Please contact to your  
nearest Elpida Memory, Inc. regarding specifications.  
This product became EOL in April, 2004.  
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.  

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