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HM5216165TT-12 PDF预览

HM5216165TT-12

更新时间: 2024-10-26 23:13:51
品牌 Logo 应用领域
尔必达 - ELPIDA 动态存储器
页数 文件大小 规格书
52页 284K
描述
16M LVTTL INTERFACE SDRAM (512-kword x 16-bit x 2-bank)

HM5216165TT-12 数据手册

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HM5216165 Series  
16 M LVTTL Interface SDRAM (512-kword × 16-bit × 2-bank)  
100 MHz/83 MHz  
E0167H10 (Ver. 1.0)  
(Previous ADE-203-280C (Z))  
Jun. 12, 2001  
Description  
All inputs and outputs are referred to the rising edge of the clock input. The HM5216165 is offered in 2  
banks for improved performance.  
Features  
3.3 V Power supply  
Clock frequency: 100 MHz/83 MHz  
LVTTL interface  
Single pulsed RAS  
2 Banks can operates simultaneously and independently  
Burst read/write operation and burst read/single write operation capability  
Programmable burst length: 1/2/4/8/full page  
2 variations of burst sequence  
Sequential (BL = 1/2/4/8/full page)  
Interleave (BL = 1/2/4/8)  
Programmable CAS latency: 1/2/3  
Byte control by DQMU and DQML  
Refresh cycles: 4096 refresh cycles/64 ms  
2 variations of refresh  
Auto refresh  
Self refresh  
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.  

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