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HM5212165FLTD-A60 PDF预览

HM5212165FLTD-A60

更新时间: 2024-10-27 05:36:11
品牌 Logo 应用领域
尔必达 - ELPIDA 动态存储器PC
页数 文件大小 规格书
62页 629K
描述
128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword × 16-bit × 4-bank/4-Mword × 8-bit × 4-bank PC/133, PC/100 SDRAM

HM5212165FLTD-A60 数据手册

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HM5212165FLTD-75/A60/B60  
HM5212805FLTD-75/A60/B60  
128M LVTTL interface SDRAM  
133 MHz/100 MHz  
2-Mword × 16-bit × 4-bank/4-Mword × 8-bit × 4-bank  
PC/133, PC/100 SDRAM  
E0180H10 (Ver. 1.0)  
Jul. 17, 2001  
Description  
The HM5212165FL is a 128-Mbit SDRAM organized as 2097152-word × 16-bit × 4-bank. The  
HM5212805FL is a 128-Mbit SDRAM organized as 4194304-word × 8-bit × 4-bank. Allinputs and outputs are  
referred to the rising edge of the clock input. It is packaged in standard 54-pin plastic TSOP II.  
Features  
3.3 V power supply  
Clock frequency: 133 MHz/100 MHz (max)  
LVTTL interface  
Single pulsed RAS  
4 banks can operate simultaneously and independently  
Burst read/write operation and burst read/single write operation capability  
Programmable burst length: 1/2/4/8/full page  
2 variations of burst sequence  
Sequential (BL = 1/2/4/8/full page)  
Interleave (BL = 1/2/4/8)  
Programmable CAS latency: 2/3  
Byte control by DQM : DQM (HM5212805FL)  
: DQMU/DQML (HM5212165FL)  
Refresh cycles: 4096 refresh cycles/64 ms  
This product became EOL in June, 2005.  
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.  

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