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HM1-65642B PDF预览

HM1-65642B

更新时间: 2024-02-22 16:16:16
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
11页 273K
描述
8K x 8 Asynchronous CMOS Static RAM

HM1-65642B 数据手册

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®
HM-65642/883  
8K x 8 Asynchronous  
CMOS Static RAM  
May 2002  
Features  
Description  
• This Circuit is Processed in Accordance to MIL-STD-  
883 and is Fully Conformant Under the Provisions of  
Paragraph 1.2.1.  
The HM-65642/883 is a CMOS 8192 x 8-bit Static Random  
Access Memory. The pinout is the JEDEC 28 pin, 8-bit wide  
standard, which allows easy memory board layouts which  
accommodate a variety of industry standard ROM, PROM,  
EPROM, EEPROM and RAMs. The HM-65642/883 is ideally  
suited for use in microprocessor based systems. In particu-  
• Full CMOS Design  
• Six Transistor Memory Cell  
• Low Standby Supply Current . . . . . . . . . . . . . . . .100µA  
• Low Operating Supply Current. . . . . . . . . . . . . . . 20mA  
• Fast Address Access Time . . . . . . . . . . . . . . . . . . 150ns  
• Low Data Retention Supply Voltage . . . . . . . . . . . 2.0V  
• CMOS/TTL Compatible Inputs/Outputs  
• JEDEC Approved Pinout  
• Equal Cycle and Access Times  
• No Clocks or Strobes Required  
• Gated Inputs  
lar, interfacing with the Intersil 80C86 and 80C88 micropro-  
cessors is simplified by the convenient output enable (G)  
input.  
The HM-65642/883 is a full CMOS RAM which utilizes an  
array of six transistor (6T) memory cells for the most stable  
and lowest possible standby supply current over the full mili-  
tary temperature range.  
- No Pull-Up or Pull-Down Resistors Required  
o
o
• Temperature Range -55 C to +125 C  
• Easy Microprocessor Interfacing  
• Dual Chip Enable Control  
Ordering Information  
PACKAGE  
CERDIP  
TEMPERATURE RANGE  
150ns/75µA  
HM1-65642B/883  
HM4-65642B/883  
150ns/150µA  
HM1-65642/883  
HM4-65642/883  
200ns/250µA  
PKG. NO.  
F28.6  
o
o
-55 C to +125 C  
HM1-65642C/883  
-
o
o
CLCC  
-55 C to +125 C  
J32.A  
Pinouts  
HM-65642/883 (CERDIP)  
TOP VIEW  
HM4-65642/883 (CLCC)  
TOP VIEW  
1
2
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
NC  
A12  
A7  
VCC  
W
PIN  
A
DESCRIPTION  
Address Input  
Data Input/Output  
Chip Enable  
Chip Enable  
Write Enable  
Output Enable  
No Connections  
Ground  
1
4
3
2
32 31 30  
29  
28  
27  
26  
25  
5
6
A8  
A9  
A6  
A5  
3
E2  
DQ  
4
A6  
A8  
7
8
9
A11  
A4  
A3  
A2  
5
A5  
A9  
E1  
E2  
NC  
G
6
A4  
A11  
G
7
A3  
W
A1 10  
A0 11  
24 A10  
23 E1  
8
A2  
A10  
E1  
G
9
A1  
NC  
GND  
VCC  
10  
11  
12  
13  
14  
12  
13  
22  
NC  
A0  
DQ7  
DQ7  
21  
DQ6  
DQ0  
DQ1  
DQ2  
GND  
18 DQ6  
17 DQ5  
16 DQ4  
15 DQ3  
DQ0  
14  
15 16 17 18 19 20  
Power  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
FN3004.2  
Copyright © Intersil Americas Inc. 202022. 0All Rights Reserved  

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