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HI-8589CJT PDF预览

HI-8589CJT

更新时间： 2024-11-14 04:57:55
品牌 Logo 应用领域
HOLTIC 驱动器接收机
页数 文件大小 规格书
14页 142K
描述
ARINC 429 LINE DRIVER AND DUAL RECEIVER

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HI-8589CJT 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：QFN
包装说明：QCCJ, LDCC44,.7SQ针数：44
Reach Compliance Code：compliantECCN代码：7A994
HTS代码：8542.39.00.01风险等级：5.84
其他特性：ALSO REQUIRES +/-9.5V TO +/-10.5V SUPPLIES地址总线宽度：
边界扫描：NO最大时钟频率：1 MHz
最大数据传输速率：0.0152587890625 MBps外部数据总线宽度：16
JESD-30 代码：S-CQCC-J44JESD-609代码：e0
长度：16.51 mm低功率模式：NO
串行 I/O 数：1端子数量：44
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装代码：QCCJ
封装等效代码：LDCC44,.7SQ封装形状：SQUARE
封装形式：CHIP CARRIER峰值回流温度（摄氏度）：225
电源：5,+-10 V认证状态：Not Qualified
座面最大高度：5.08 mm子类别：Serial IO/Communication Controllers
最大压摆率：20 mA最大供电电压：5.25 V
最小供电电压：4.75 V标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：J BEND端子节距：1.27 mm
端子位置：QUAD处于峰值回流温度下的最长时间：30
宽度：16.51 mmuPs/uCs/外围集成电路类型：SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches：1

HI-8589CJT 数据手册

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HI-8581, HI-8589  
ARINC 429 LINE DRIVER AND DUAL RECEIVER  
September 2006  
GENERALDESCRIPTION  
FEATURES  
! ARINC specification 429 compliant  
The HI-8581 and HI-8589 from Holt Integrated Circuits are  
silicon gate CMOS devices for interfacing a 16-bit parallel  
data bus directly to the ARINC 429 serial bus. Both  
devices provide two receivers, an independent transmitter  
and line driver capability in a single package. The receiver  
input circuitry and logic are designed to meet the  
ARINC 429 specifications for loading, level detection,  
timing, and protocol. The transmitter section provides the  
ARINC 429 communication protocol and the line driver  
circuits provide the ARINC 429 output levels.  
! Direct receiver and transmitter interface to  
ARINC bus in a single device  
! 16-Bit parallel data bus  
! Timing control 10 times the data rate  
! Selectable data clocks  
! Receiver error rejection per ARINC  
specification 429  
! Automatic transmitter data timing  
! Self test mode  
The 16-bit parallel data bus exchanges the 32-bit ARINC  
data word in two steps when either loading the transmitter  
or interrogating the receivers. The data bus interfaces  
with CMOS and TTL.  
! Parity functions  
! Low power  
The HI-8581 has 37.5 ohms in series with each line driver  
output. The HI-8589 provides the option to bypass most of  
the internal output resistance so that external series  
resistance may be added for lighting protection and still  
match the 75 ohm characteristic impedance of the ARINC  
bus.  
! Industrial & full military temperature ranges  
PIN CONFIGURATION (Top View)  
Each independent receiver monitors the data stream with  
a sampling rate 10 times the data rate. The sampling rate  
is software selectable at either 1MHz or 125KHz. The  
results of a parity check are available as the 32nd ARINC  
bit. The HI-8581 and HI-8589 examine the null and data  
timings and will reject erroneous patterns. For example,  
with a 125 KHz clock selection, the data frequency must  
be between 10.4 KHz and 15.6 KHz.  
429DI2(B) - 1  
D/R1 - 2  
D/R2 - 3  
SEL - 4  
33 - ENTX  
32 - N/C  
31 - V+  
30 - TXB(OUT)  
29 - TXA(OUT)  
28 - V-  
27 - GND  
26 - TX/R  
25 - PL2  
24 - PL1  
23 - BD00  
HI-8581PQI  
HI-8589PQI  
&
HI-8581PQT  
HI-8589PQT  
The transmitter has a First In, First Out (FIFO) memory to  
store 8 ARINC words for transmission. The data rate of  
the transmitter is software selectable by dividing the  
master clock, CLK, by either 10 or 80. The master clock is  
used to set the timing of the ARINC transmission within the  
required resolution.  
EN1 - 5  
EN2 - 6  
BD15 - 7  
BD14 - 8  
BD13 - 9  
BD12 - 10  
BD11 - 11  
APPLICATIONS  
! Avionics data communication  
! Serial to parallel conversion  
! Parallel to serial conversion  
44-Pin Plastic Quad Flat Pack (PQFP)  
(See page 12 for additional pin configurations)  
HOLT INTEGRATED CIRCUITS  
www.holtic.com  
(DS8581 Rev. G)  
09/06  
1234567...14

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