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HI-8588_06 PDF预览

HI-8588_06

更新时间: 2024-11-14 04:57:55
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HOLTIC /
页数 文件大小 规格书
6页 117K
描述
ARINC 429 LINE RECEIVER

HI-8588_06 数据手册

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HI-8588  
ARINC 429 LINE RECEIVER  
August 2006  
DESCRIPTION  
PIN CONFIGURATION  
The HI-8588 is an ARINC 429 bus interface receiver and is  
available in a SO 8 pin package. The technology is  
analog/digital CMOS. The circuitry requires only a 5 volt  
supply.  
VCC - 1  
TESTA - 2  
RINB - 3  
RINA - 4  
8 - TESTB  
7 - ROUTB  
6 - ROUTA  
5 - GND  
8588PS  
The ARINC bus can be connected directly to the chip. The  
typical 10 volt differential signal is translated and input to a  
window comparator and latch. The comparator levels are  
just below the standard 6.5 volt minimum ARINC data  
threshold and just above the standard 2.5 volt maximum  
ARINC null threshold.  
8 - PIN PLASTIC NARROW BODY SOIC  
SUPPLY VOLTAGES  
The TESTA and TESTB inputs bypass the analog for  
testing purposes. Also if TESTAand TESTB are both taken  
high, the analog powers down and the digital outputs tri-  
state allowing wire-or possibilities.  
vcc = 5.0V 5%  
Please refer to the HI-8588-10 for applications where an  
external resistance in series with the ARINC inputs is  
required for lightning protection or when the digital outputs  
need to be a logic zero rather than open circuit when  
TESTAandTESTB are both high.  
FUNCTION TABLE  
RECEIVER  
RINA  
RINB  
TESTA TESTB ROUTA ROUTB  
See Holt Application Note AN-300 for more information on  
lightning protection.  
-1.25V to 1.25V  
-1.25V to 1.25V  
0
0
0
0
1
1
0
0
0
1
0
1
0
0
0
1
-3.25V to -6.5V  
3.25V to 6.5V  
3.25V to 6.5V  
-3.25V to -6.5V  
1
0
FEATURES  
X
X
X
X
X
X
0
1
! Direct ARINC 429 line receiver interface  
in a small outline package  
1
0
HI-Z  
HI-Z  
! Receiver input hystersis at least 2 volts  
PIN DESCRIPTION TABLE  
! Test inputs that bypass analog input and  
can power down and tri-state outputs  
PIN  
1
SYMBOL  
VCC  
FUNCTION  
SUPPLY  
DESCRIPTION  
5 VOLT SUPPLY  
CMOS  
! Plastic and ceramic package options -  
2
TESTA  
RINB  
LOGIC INPUT  
ARINC INPUT  
ARINC INPUT  
POWER  
surface mount and DIP  
3
RECEIVER B INPUT  
RECEIVER A INPUT  
GROUND  
4
RINA  
5
GND  
! Mil processing available  
6
ROUTA  
ROUTB  
TESTB  
LOGIC OUTPUT  
LOGIC OUTPUT  
LOGIC INPUT  
RECEIVER CMOS OUTPUT A  
RECEIVER CMOS OUTPUT B  
CMOS  
7
8
HOLT INTEGRATED CIRCUITS  
www.holtic.com  
(DS8588 Rev. C)  
08/06  

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