HI-8588
January 2001
DESCRIPTION
PIN CONFIGURATION
The HI-8588 is an ARINC 429 bus interface receiver and is
available in a SO 8 pin package. The technology is
analog/digital CMOS. The circuitry requires only a 5 volt
supply.
VCC 1
TESTA 2
RINB 3
8 TESTB
7 ROUTB
6 ROUTA
The ARINC bus can be connected directly to the chip. The
typical 10 volt differential signal is translated and input to a
window comparator and latch. The comparator levels are
just below the standard 6.5 volt minimum ARINC data
threshold and just above the standard 2.5 volt maximum
ARINC nullthreshold.
RINA 4
5
GND
SUPPLY VOLTAGES
The TESTA and TESTB inputs bypass the analog for
testing purposes. Also if TESTA and TESTB are both
taken high, the analog powers down and the digital outputs
tri-state allowing wire-or possibilities.
vcc = 5.0V ± 5%
Please refer to the HI-8588-10 for applications where an
external resistance in series with the ARINC inputs is
required for lightning protection or when the digital outputs
need to be a logic zero rather than open circuit when
TESTA and TESTBare both high.
FUNCTION TABLE
FEATURES
! Direct ARINC 429 line receiver interface
in a small outline package
! Receiver input hystersis at least 2 volts
! Test inputs that bypass analog input and
PIN DESCRIPTION TABLE
can power down and tri-state outputs
PIN
SYMBOL
VCC
FUNCTION
SUPPLY
DESCRIPTION
5 VOLT SUPPLY
! Plastic and ceramic package options -
surface mount and DIP
TESTA
RINB
LOGIC INPUT
ARINC INPUT
ARINC INPUT
POWER
CMOS
RECEIVER B INPUT
RECEIVER A INPUT
GROUND
RINA
! Mil processing available
GND
ROUTA
ROUTB
TESTB
LOGIC OUTPUT
LOGIC OUTPUT
LOGIC INPUT
RECEIVER CMOS OUTPUT A
RECEIVER CMOS OUTPUT B
CMOS
HOLT INTEGRATED CIRCUITS
1
(DS8588 Rev. A)
01/01