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HI-6010JF PDF预览

HI-6010JF

更新时间: 2024-10-01 04:21:47
品牌 Logo 应用领域
HOLTIC 微控制器和处理器串行IO控制器通信控制器外围集成电路
页数 文件大小 规格书
12页 116K
描述
ARINC 429 TRANSMITTER/RECEIVER FOR 8 BIT BUS

HI-6010JF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QLCC
包装说明:QCCJ,针数:28
Reach Compliance Code:compliantECCN代码:7A994
HTS代码:8542.39.00.01风险等级:5.65
Is Samacsys:N地址总线宽度:
边界扫描:NO外部数据总线宽度:8
JESD-30 代码:S-PQCC-J28JESD-609代码:e3
长度:11.5062 mm低功率模式:NO
湿度敏感等级:3串行 I/O 数:1
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):245
认证状态:Not Qualified座面最大高度:4.597 mm
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:11.5062 mm
uPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, SERIALBase Number Matches:1

HI-6010JF 数据手册

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HI-6010  
ARINC 429 TRANSMITTER/RECEIVER FOR 8 BIT BUS  
January 2006  
GENERAL DESCRIPTION  
FEATURES  
The HI-6010 is a CMOS integrated circuit designed to  
interface the avionics data bus standard ARINC 429 to an  
8 bit port. It contains one receiver and one transmitter.  
They operate independently except for the self test option  
and the parity option. The receiver demands that the  
incoming data meet the standard protocol and the trans-  
mitter outputs a standard protocol stream.  
!
ARINC 429 protocol controller with interface to  
an 8 bit bus  
!
!
!
!
!
Automatic label recognition option  
8 bit or 32 bit buffering option  
Self test and parity options  
CMOS / TTL logic pins  
The HI-6010 provides flexible options for interfacing to the  
user system. The controlling processor can operate both  
the receiver and transmitter either by using hard wired  
flags and gates at the pins or by using software reads and  
writes of the Status Register and Control Register or a  
combination thereof.  
Plastic and ceramic package options - surface  
mount or DIP  
!
Military processing available  
The chip is programmable to operate with single 8 bit  
bytes requiring "on the fly transmitter loading and receiver  
downloading" or to operate in 32 bit "extended buffer"  
mode. In addition there is an option to use automatic label  
recognition after loading 8 possible labels for comparison.  
Parity and self test are also software programmable.  
Master Reset is activated only by taking the MR pin high.  
PIN CONFIGURATION (Top View)  
VSS  
WEF  
1
2
3
4
5
6
7
8
9
28 RE  
27 C/D  
26 CS  
25 WE  
24 D7  
23 D6  
22 D5  
21 D4  
20 D3  
19 D2  
18 D1  
17 D0  
16 RXD1  
15 VDD  
CTS  
TXC  
HFS  
Two clock inputs allow independent selection of the data  
rates of the transmitter and receiver. Each must be 4X the  
desiredARINC 429 frequency.  
MR  
TXE  
RXRDY  
TXRDY  
Error flags are generated for transmitter underwrites and  
for receiver data framing miscues, parity errors, and buffer  
overwrites.  
TXD0 10  
TXD1 11  
RXC 12  
FCR 13  
RXD0 14  
The HI-6010 is a 5 volt chip that will require data transla-  
tion from and to theARINC bus. The HI-8482 and HI-8588  
line receivers are available for the receiver side and the  
HI-318X and HI-858X line drivers are available for the  
transmitter side.  
Pin numbers apply for plastic and ceramic DIP and  
for plastic PLCC. Consult factory for pin out of 48  
lead ceramic leadless chip carrier.  
APPLICATIONS  
OPERATING SUPPLY VOLTAGE  
! Avionics Data Communication  
! Serial to Parallel Conversion  
! Parallel to Serial Conversion  
! VDD = 5.0 VOLTS 5%  
! VSS = 0.0 VOLTS  
HOLT INTEGRATED CIRCUITS  
www.holtic.com  
(DS6010 Rev.D)  
01/06  

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