HI-3282, HI-3282B
ARINC 429
Serial Transmitter and Dual Receiver
July 2013
GENERALDESCRIPTION
FEATURES
• ARINC specification 429 compatible
The HI-3282 is a silicon gate CMOS device for interfacing
the ARINC 429 serial data bus to a 16-bit parallel data bus.
Two receivers and an independent transmitter are
provided. The receiver input circuitry and logic are
designed to meet theARINC 429 specifications for loading,
level detection, timing, and protocol. The ARINC inputs of
the HI-3282-10 configurations also have internal lightning
protection to DO-160D, Level 3. The transmitter section
provides the ARINC 429 communication protocol. An
externalARINC 429 Line Driver such as the Holt HI-3182 or
HI-8585 is required to translate the 5 volt logic outputs to
ARINC 429 drive levels.
• Compatible with Industry-standard alternate
parts
• Small footprint 44-pin PQFP package option
• 16-Bit parallel data bus
• Direct receiver interface to ARINC bus
• Internal Lightning Protection of ARINC inputs
per DO-160D, Level 3 in -10 configurations
• Timing control 10 times the data rate
• Selectable data clocks
The 16-bit parallel data bus exchanges the 32-bit ARINC
data word in two steps when either loading the transmitter
or interrogating the receivers. The data bus interfaces with
CMOS andTTL.
• Automatic transmitter data timing
• Self test mode
• Parity functions
• Low power, single 5 volt supply
• Industrial & extended temperature ranges
Timing of all the circuitry begins with the master clock input,
CLK. For ARINC 429 applications, the master clock
frequency is 1 MHz.
Each independent receiver monitors the data stream with a
sampling rate 10 times the data rate. The sampling rate is
software selectable at either 1MHz or 125KHz. The results
of a parity check are available as the 32ndARINC bit.
PIN CONFIGURATION (Top View)
The transmitter has a First In, First Out (FIFO) memory to
store 8ARINC words for transmission. The data rate of the
transmitter is software selectable by dividing the master
clock, CLK, by either 10 or 80. The master clock is used to
set the timing of theARINC transmission within the required
resolution.
N/C - 1
D/R1 - 2
D/R2 - 3
SEL - 4
EN1 - 5
EN2 - 6
BD15 - 7
BD14 - 8
BD13 - 9
BD12 - 10
BD11 - 11
33 - N/C
32 - N/C
31 - CWSTRX
30 - ENTX
29 - 429DO
28 -429DO
27 - TX/R
26 - PL2
25 - PL1
24 - BD00
23 - BD01
HI-3282PQI
HI-3282PQI-10
HI-3282PQT
&
The HI-3282BPJx product has a minimum low speed data
rate of 6.5K BPS.
HI-3282PQT-10
APPLICATIONS
• Avionics data communication
• Serial to parallel conversion
• Parallel to serial conversion
44-Pin Plastic Quad Flat Pack (PQFP)
(See page 10 for additional pin configurations)
HOLT INTEGRATED CIRCUITS
www.holtic.com
(DS3282 Rev. O)
07/13