HFBR-5208xxxZ
1 x 9 Fiber Optic Transceivers for 622 Mb/s
ATM/SONET/SDH Applications
Data Sheet
Description
General
Features
ꢀ Links of 500 m with 62.5/125 μm multimode fiber
(MMF) from 155-622 Mb/s
The HFBR-5208xxxZ (multimode transceiver) from Avago
allow the system designer to implement a range of solu-
tions for ATM/SONET STS-12/SDH STM-4 applications.
ꢀ RoHS compliant
ꢀ Compliant with ATM forum 622.08 Mb/s physical layer
specification (AF-PHY-0046.000)
The overall Avago transceiver consists of three sections:
the transmitter and receiver optical subassemblies, an
electrical subassembly and the mezzanine package
housing which incorporates a duplex SC connector
receptacle.
ꢀ Compliant with ANSI broadband ISDN - physical layer
specification T1.646-1995 and T1.646a-1997
ꢀ HFBR-5208xxxZ is compliant with ANSI network to
customer installation interfaces - synchronous optical
NETwork (SONET) physical media dependent specifi-
cation: multimode fiber T1.416.01-1998
Transmitter Section
ꢀ Industry-standard multi-sourced 1 x 9 mezzanine
The transmitter section of the HFBR-5208xxxZ consists
of a 1300 nm LED in an optical subassembly (OSA) which
mates to the multimode fiber cable. The OSA’s are driven
by a custom, silicon bipolar IC which converts differential
PECL logic signals (ECL referenced to a +5 V supply) into
an analog LED drive current.
package style
ꢀ Single +5 V power supply operation and PECL logic
interfaces
ꢀ Wave solder and aqueous wash process compatible
Applications
Receiver Section
ꢀ General purpose low-cost MMF links at 155 to 650
Mb/s
The receiver contains an InGaAs PIN photodiode mounted
together with a custom, silicon bipolar transimpedance
preamplifier IC in an OSA. This OSA is mated to a custom,
silicon bipolar circuit providing post amplification and
quantization and optical signal detection.
ꢀ ATM 622 Mb/s MMF links from switch-to-switch or
switch-to-server in the end-user premise
ꢀ Private MMF interconnections at 622 Mb/s SONET
STS-12/SDH STM-4 rate
The custom, silicon bipolar circuit includes a Signal Detect
circuit which provides a PECL logic high state output
upon detection of a usable input optical signal level. This
single-ended PECL output is designed to drive a standard
PECL input through normal 50 W PECL load.