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HFA3783IN96 PDF预览

HFA3783IN96

更新时间: 2024-02-24 01:57:06
品牌 Logo 应用领域
英特矽尔 - INTERSIL 射频微波
页数 文件大小 规格书
34页 608K
描述
I/Q Modulator/Demodulator and Synthesizer

HFA3783IN96 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:PLASTIC, LQFP-48Reach Compliance Code:not_compliant
风险等级:5.82Is Samacsys:N
特性阻抗:50 Ω构造:COMPONENT
最大输入功率 (CW):调制技术:I/Q
最大工作频率:600 MHz最小工作频率:70 MHz
最高工作温度:85 °C最低工作温度:-40 °C
射频/微波设备类型:MODULATOR/DEMODULATOR最大电压驻波比:1.4
Base Number Matches:1

HFA3783IN96 数据手册

 浏览型号HFA3783IN96的Datasheet PDF文件第2页浏览型号HFA3783IN96的Datasheet PDF文件第3页浏览型号HFA3783IN96的Datasheet PDF文件第4页浏览型号HFA3783IN96的Datasheet PDF文件第5页浏览型号HFA3783IN96的Datasheet PDF文件第6页浏览型号HFA3783IN96的Datasheet PDF文件第7页 
HFA3783  
TM  
Data Sheet  
March 2000  
File Number 4633.2  
I/Q Modulator/Demodulator and  
Synthesizer  
Features  
• Integrates All IF Transmit and Receive Functions  
• Broad Quadrature Frequency Range . . . . . .70 to 600MHz  
• 600MHz AGC IF Strip with Level Detector . . . . . . . . .69dB  
• DC Coupled Baseband Interfaces  
The HFA3783 is a highly integrated and  
fully differential SiGe baseband  
converter for half duplex wireless  
applications. It features all the  
necessary blocks for quadrature  
modulation and demodulation of “I” and “Q” baseband  
signals.  
• Integrates a Receiver DC Offset Calibration Loop  
• Integrated 3 Wire Interface PLL For LO Applications  
• Low LO Drive Level . . . . . . . . . . . . . . . . . . . . . . . -15dBm  
• Fast Transmit-Receive Switching . . . . . . . . . . . . . . . .<1µs  
• Power Management/Standby Mode  
It has an integrated AGC receive IF amplifier with frequency  
response to 600MHz. The AGC has 70dB of voltage gain  
and better than 70dB of gain control range. The transmit  
output also features gain control with 70dB of range.  
• Single Supply 2.7 to 3.3V Operation  
The receive and transmit IF paths can share a common  
differential matching network to reduce the filter component  
count required for single IF half duplex transceivers. A pair of  
2nd order antialiasing filters with an integrated DC offset  
cancellation architecture is included in the receive chain for  
baseband operation down to DC. In addition, an IF level  
detector is included in the AGC chain for threshold  
comparison. Up and down conversion are performed by  
doubly balanced mixers for “I” and “Q” IF processing. These  
converters are driven by a broadband quadrature LO  
generator with frequency of operation phase locked by an  
internal 3 wire interface synthesizer and PLL.  
Applications  
• IEEE802.11 1 and 2Mbps Standard  
• Systems Targeting IEEE 802.11 11Mbps Standard  
• Wireless Local Area Networks  
• PCMCIA Wireless Transceivers  
• ISM Systems  
• TDMA Packet Protocol Radios  
Ordering Information  
The device operates at low LO levels from an external VCO  
with a PLL reference signal up to 50MHz. The HFA3783 is  
housed in a thin 48 lead LQFP package well suited for  
PCMCIA board applications.  
PART  
NUMBER  
TEMP. RANGE  
o
( C)  
PACKAGE  
PKG. NO.  
HFA3783IN  
-40 to 85  
-40 to 85  
48 Ld LQFP Q48.7x7A  
Tape and Reel  
HFA3783IN96  
Simplified Block Diagram  
IF DETECTOR OUT  
RECEIVE AGC  
BASEBAND RXI  
CAL ENABLE  
I
OFFSET  
CAL  
IF_IN  
BASEBAND RXQ  
Q
IF 2X LO / VCO IN  
CHARGE PUMP OUT  
3 WIRE INTERFACE  
REF IN  
o
o
0 /90 PLL MODULE  
IF_OUT  
BASEBAND TX I  
BASEBAND TXQ  
TRANSMIT IF AGC  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000  
PRISM is a registered trademark of Intersil Corporation. PRISM logo is a trademark of Intersil Corporation.  

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