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HEF4104BPN PDF预览

HEF4104BPN

更新时间： 2024-09-28 21:22:35
品牌 Logo 应用领域
恩智浦 - NXP 驱动高压光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
14页 126K
描述
IC 4000/14000/40000 SERIES, 4-BIT DRIVER, COMPLEMENTARY OUTPUT, PDIP16, PLASTIC, SOT-38-1, DIP-16, Bus Driver/Transceiver

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HEF4104BPN 技术参数

Source Url Status Check Date：2013-06-14 00:00:00是否Rohs认证： 符合
生命周期：Transferred零件包装代码：DIP
包装说明：DIP,针数：16
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.28其他特性：LOW TO HIGH VOLTAGE TRANSLATOR
系列：4000/14000/40000JESD-30 代码：R-PDIP-T16
长度：21.6 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER位数：4
功能数量：1端口数量：2
端子数量：16最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：COMPLEMENTARY封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：245
传播延迟（tpd）：340 ns认证状态：Not Qualified
座面最大高度：4.7 mm最大供电电压 (Vsup)：15 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：7.62 mm
Base Number Matches：1

HEF4104BPN 数据手册

 浏览型号HEF4104BPN的Datasheet PDF文件第2页浏览型号HEF4104BPN的Datasheet PDF文件第3页浏览型号HEF4104BPN的Datasheet PDF文件第4页浏览型号HEF4104BPN的Datasheet PDF文件第5页浏览型号HEF4104BPN的Datasheet PDF文件第6页浏览型号HEF4104BPN的Datasheet PDF文件第7页 
HEF4104B  
Quad low-to-high voltage translator with 3-state outputs  
Rev. 07 — 16 December 2009  
Product data sheet  
1. General description  
The HEF4104B is a quad low voltage-to-high voltage translator with 3-state outputs. It  
provides the capability of interfacing low voltage circuits to high voltage circuits. For  
example low voltage Local Oxidation Complementary MOS (LOCMOS) and Transistor  
Transistor Logic (TTL) to high voltage LOCMOS. It has four data inputs (A0 to A3), an  
active HIGH output enable input (OE), four data outputs (B0 to B3) and their complements  
(B0 to B3).  
With OE = HIGH, the outputs B0 to B3 and B0 to B3 are in the low impedance ON-state,  
either HIGH or LOW as determined by the inputs A0 to A3. With OE = LOW, the outputs  
B0 to B3 and B0 to B3 are in the high-impedance OFF-state.  
It uses a common negative supply (VSS) and separate positive supplies for the inputs  
(VDD(A)) and the outputs (VDD(B)). VDD(A) must always be less than or equal to VDD(B), even  
during power turn-on and turn-off. For the permissible operating range of VDD(A) and  
V
DD(B) see Figure 4.  
Each input protection circuit is terminated between VDD(B) and VSS. This allows the input  
signals to be driven from any potential between VDD(B) and VSS, without regard to current  
limiting. When driving from potentials greater than VDD(B) or less than VSS, the current at  
each input must be limited to 10 mA.  
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS  
(usually ground). Unused inputs must be connected to VDD, VSS, or another input. It is  
also suitable for use over the full industrial (−40 °C to +85 °C) temperature range.  
2. Features  
„ Fully static operation  
„ 5 V, 10 V, and 15 V parametric ratings  
„ Standardized symmetrical output characteristics  
„ Inputs and outputs are protected against electrostatic effects  
„ Operates across the full industrial temperature range from −40 °C to +85 °C  
„ Complies with JEDEC standard JESD 13-B  
3. Applications  
„ Industrial  
 
 
 
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