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HD74LV1GT08ACME PDF预览

HD74LV1GT08ACME

更新时间: 2024-01-26 13:56:36
品牌 Logo 应用领域
瑞萨 - RENESAS 转换器电平转换器
页数 文件大小 规格书
11页 86K
描述
2?input AND Gate / CMOS Logic Level Shifter

HD74LV1GT08ACME 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Not Recommended零件包装代码:SON
包装说明:VSOF,针数:5
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.52系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-F5JESD-609代码:e6
长度:1.6 mm逻辑集成电路类型:AND GATE
湿度敏感等级:1功能数量:1
输入次数:2端子数量:5
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:VSOF
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE
峰值回流温度(摄氏度):260传播延迟(tpd):14 ns
认证状态:Not Qualified座面最大高度:0.6 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN BISMUTH端子形式:FLAT
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:20宽度:1.2 mm
Base Number Matches:1

HD74LV1GT08ACME 数据手册

 浏览型号HD74LV1GT08ACME的Datasheet PDF文件第2页浏览型号HD74LV1GT08ACME的Datasheet PDF文件第3页浏览型号HD74LV1GT08ACME的Datasheet PDF文件第4页浏览型号HD74LV1GT08ACME的Datasheet PDF文件第5页浏览型号HD74LV1GT08ACME的Datasheet PDF文件第6页浏览型号HD74LV1GT08ACME的Datasheet PDF文件第7页 
HD74LV1GT08A  
2–input AND Gate / CMOS Logic Level Shifter  
REJ03D0118–0800Z  
(Previous ADE-205-328F (Z))  
Rev.8.00  
Sep.24.2003  
Description  
The HD74LV1GT08A is high-speed CMOS two input AND gate using silicon gate CMOS process. With  
CMOS low power dissipation, it provides high-speed equivalent to LS–TTL series. The internal circuit of  
three stages construction with buffer provides wide noise margin and stable output. The input protection  
circuitry on this device allows over voltage tolerance on the input, allowing the device to be used as a  
logic–level translator from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V  
CMOS Logic while operating at the high-voltage power supply. Low voltage and high-speed operation is  
suitable for the battery powered products (e.g., notebook computers), and the low power consumption  
extends the battery life.  
Features  
The basic gate function is lined up as Renesas uni logic series.  
Supplied on emboss taping for high-speed automatic mounting.  
TTL compatible input level.  
Supply voltage range : 3.0 to 5.5 V  
Operating temperature range : –40 to +85°C  
Logic-level translate function  
3.0 V CMOS logic 5.0 V CMOS logic (@VCC = 5.0 V)  
1.8 V or 2.5 V CMOS logic 3.3 V CMOS logic (@VCC = 3.3 V)  
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)  
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)  
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)  
All the logical input has hysteresis voltage for the slow transition.  
Ordering Information  
Part Name  
Package Type  
Package Code  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
HD74LV1GT08ACME CMPAK-5 pin  
HD74LV1GT08AVSE VSON-5 pin  
CMPAK-5V  
CMPAK-5V(O)  
TNP-5DV  
CM  
VS  
E (3,000 pcs/reel)  
Rev.8.00, Sep.24.2003, page 1 of 10  

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