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HD74LV1GT00AVSE PDF预览

HD74LV1GT00AVSE

更新时间: 2024-02-02 01:43:48
品牌 Logo 应用领域
瑞萨 - RENESAS 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 101K
描述
2-input NAND Gate / CMOS Logic Level Shiftereg

HD74LV1GT00AVSE 技术参数

是否无铅:含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SON
包装说明:VSOF, FL5/6,.047,20针数:5
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.52Is Samacsys:N
系列:LV/LV-A/LVX/HJESD-30 代码:R-PDSO-F5
JESD-609代码:e0长度:1.6 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.006 A湿度敏感等级:1
功能数量:1输入次数:2
端子数量:5最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:VSOF封装等效代码:FL5/6,.047,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 VProp。Delay @ Nom-Sup:14 ns
传播延迟(tpd):14 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:0.6 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:FLAT
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:1.2 mm
Base Number Matches:1

HD74LV1GT00AVSE 数据手册

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HD74LV1GT00A  
2–input NAND Gate / CMOS Logic Level Shifter  
REJ03D0115-0900  
Rev.9.00  
Mar 21, 2008  
Description  
The HD74LV1GT00A is high-speed CMOS two input NAND gate using silicon gate CMOS process. With CMOS low  
power dissipation, it provides high-speed equivalent to LS–TTL series. The internal circuit of three stages construction  
with buffer provides wide noise margin and stable output. The input protection circuitry on this device allows over  
voltage tolerance on the input, allowing the device to be used as a logic–level translator from 3.0 V CMOS Logic to 5.0  
V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high-voltage power supply.  
Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the  
low power consumption extends the battery life.  
Features  
The basic gate function is lined up as Renesas uni logic series.  
Supplied on emboss taping for high-speed automatic mounting.  
TTL compatible input level.  
Supply voltage range : 3.0 to 5.5 V  
Operating temperature range : –40 to +85°C  
Logic-level translate function  
3.0 V CMOS logic 5.0 V CMOS logic (@VCC = 5.0 V)  
1.8 V or 2.5 V CMOS logic 3.3 V CMOS logic (@VCC = 3.3 V)  
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)  
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)  
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)  
All the logical input has hysteresis voltage for the slow transition.  
Ordering Information  
Package Code  
(Previous Code)  
PTSP0005ZC-A  
(CMPAK-5V)  
Package  
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
CMPAK–5 pin  
VSON–5 pin  
Abbreviation  
HD74LV1GT00ACME  
HD74LV1GT00AVSE  
CM  
E (3000 pcs/reel)  
E (3000 pcs/reel)  
PUSN0005KA-A  
(TNP-5DV)  
VS  
Note: Please consult the sales office for the above package availability.  
REJ03D0115-0900 Rev.9.00, Mar 21, 2008  
Page 1 of 6  

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