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HD74LS373FPEL PDF预览

HD74LS373FPEL

更新时间: 2024-09-27 05:35:15
品牌 Logo 应用领域
瑞萨 - RENESAS 总线驱动器总线收发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 97K
描述
Octal D-type Transparent Latches (with three-state outputs)

HD74LS373FPEL 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP20,.3针数:20
Reach Compliance Code:compliant风险等级:5.2
系列:LSJESD-30 代码:R-PDSO-G20
长度:12.6 mm负载电容(CL):45 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.024 A
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:75 °C
最低工作温度:-20 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 V最大电源电流(ICC):40 mA
Prop。Delay @ Nom-Sup:18 ns传播延迟(tpd):30 ns
认证状态:Not Qualified座面最大高度:2.2 mm
子类别:FF/Latches最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL EXTENDED端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.5 mm
Base Number Matches:1

HD74LS373FPEL 数据手册

 浏览型号HD74LS373FPEL的Datasheet PDF文件第2页浏览型号HD74LS373FPEL的Datasheet PDF文件第3页浏览型号HD74LS373FPEL的Datasheet PDF文件第4页浏览型号HD74LS373FPEL的Datasheet PDF文件第5页浏览型号HD74LS373FPEL的Datasheet PDF文件第6页浏览型号HD74LS373FPEL的Datasheet PDF文件第7页 
HD74LS373  
Octal D-type Transparent Latches (with three-state outputs)  
REJ03D0482–0200  
Rev.2.00  
Feb.18.2005  
The HD74LS373, 8-bit register features totem-pole three-state outputs designed specifically for driving highly-  
capacitive or relatively low-impedance loads. The high-impedance third state and increased high-logic-level drive  
provide this register with the capacity of being connected directly to and driving the bus lines in a bus-organized system  
without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O  
ports, bidirectional bus drivers, and working registers.  
The eight latches are transparent D-type latches meaning that while the enable (G) is high the Q outputs will follow the  
data (D) inputs. When the enable is taken low the output will be latched at the level of the data that was setup.  
Features  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
PRDP0020AC-B  
(DP-20NEV)  
HD74LS373P  
DILP-20 pin  
P
PRSP0020DD-B  
(FP-20DAV)  
HD74LS373FPEL  
HD74LS373RPEL  
SOP-20 pin (JEITA)  
SOP-20 pin (JEDEC)  
FP  
RP  
EL (2,000 pcs/reel)  
EL (1,000 pcs/reel)  
PRSP0020DC-A  
(FP-20DBV)  
Note: Please consult the sales office for the above package availability.  
Pin Arrangement  
Output  
1
Control  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VCC  
2
3
1Q  
1D  
Q
D
Q
D
8Q  
OE  
OE  
G
G
8D  
4
2D  
7D  
D
Q
D
Q
G
OE  
G
OE  
5
2Q  
7Q  
6
3Q  
6Q  
Q
D
Q
D
OE  
OE  
G
G
7
3D  
6D  
8
4D  
5D  
D
Q
D
Q
G
OE  
G
OE  
9
4Q  
5Q  
10  
GND  
Enable G  
(Top view)  
Rev.2.00, Feb.18.2005, page 1 of 7  

HD74LS373FPEL 替代型号

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