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HD74LS126AP-E PDF预览

HD74LS126AP-E

更新时间: 2024-11-30 13:08:15
品牌 Logo 应用领域
瑞萨 - RENESAS 逻辑集成电路驱动
页数 文件大小 规格书
4页 67K
描述
LS SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDIP14, DP-14

HD74LS126AP-E 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Contact Manufacturer零件包装代码:DIP
包装说明:DP-14针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.12Is Samacsys:N
系列:LSJESD-30 代码:R-PDIP-T14
JESD-609代码:e4长度:19.2 mm
逻辑集成电路类型:BUS DRIVER湿度敏感等级:1
位数:1功能数量:4
端口数量:2端子数量:14
最高工作温度:75 °C最低工作温度:-20 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):18 ns
认证状态:Not Qualified座面最大高度:5.06 mm
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL EXTENDED
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

HD74LS126AP-E 数据手册

 浏览型号HD74LS126AP-E的Datasheet PDF文件第2页浏览型号HD74LS126AP-E的Datasheet PDF文件第3页浏览型号HD74LS126AP-E的Datasheet PDF文件第4页 
HD74LS126A  
Quadruple Bus Buffer Gates (with three-state outputs)  
REJ03D0431–0300  
Rev.3.00  
Jul.13.2005  
Features  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
PRSP0014DF-B  
(FP-14DAV)  
HD74LS126AFPEL  
HD74LS126ARPEL  
SOP-14 pin(JEITA)  
SOP-14 pin(JEDEC)  
FP  
RP  
EL (2,000 pcs/reel)  
PRSP0014DE-A  
(FP-14DNV)  
EL (2,500 pcs/reel)  
Note: Please consult the sales office for the above package availability.  
Pin Arrangement  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1C  
1A  
VCC  
4C  
4A  
4Y  
3C  
3A  
3Y  
1Y  
2C  
2A  
2Y  
8
GND  
(Top view)  
Function Table  
Inputs  
Output  
C
L
A
X
H
L
Y
Z
H
L
H
H
Note: H ; high level,  
L ; low level,  
X ; irrelevant,  
Z ; off (high-impedance) state of a 3-state output  
Rev.3.00, Jul.13.2005, page 1 of 3  

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