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HD74LS107AP PDF预览

HD74LS107AP

更新时间: 2024-11-26 05:35:15
品牌 Logo 应用领域
瑞萨 - RENESAS 触发器锁存器
页数 文件大小 规格书
7页 95K
描述
Dual J-K Negative-edge-triggered Flip-Flops (with Clear)

HD74LS107AP 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:DIP包装说明:19.2 X 6.3 MM, 2.54 MM PITCH, PLASTIC, DP-14
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.32
Is Samacsys:N系列:LS
JESD-30 代码:R-PDIP-T14长度:19.2 mm
逻辑集成电路类型:J-K FLIP-FLOP最大频率@ Nom-Sup:30000000 Hz
最大I(ol):0.008 A湿度敏感等级:1
位数:2功能数量:2
端子数量:14最高工作温度:75 °C
最低工作温度:-20 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):6 mA
传播延迟(tpd):20 ns认证状态:Not Qualified
座面最大高度:5.06 mm子类别:FF/Latches
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL EXTENDED
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:NEGATIVE EDGE宽度:7.62 mm
最小 fmax:30 MHzBase Number Matches:1

HD74LS107AP 数据手册

 浏览型号HD74LS107AP的Datasheet PDF文件第2页浏览型号HD74LS107AP的Datasheet PDF文件第3页浏览型号HD74LS107AP的Datasheet PDF文件第4页浏览型号HD74LS107AP的Datasheet PDF文件第5页浏览型号HD74LS107AP的Datasheet PDF文件第6页浏览型号HD74LS107AP的Datasheet PDF文件第7页 
HD74LS107A  
Dual J-K Negative-edge-triggered Flip-Flops (with Clear)  
REJ03D0425–0300  
Rev.3.00  
Jul.13.2005  
Features  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
DILP-14 pin  
PRDP0014AB-B  
(DP-14AV)  
HD74LS107AP  
HD74LS107AFPEL  
P
PRSP0014DF-B  
(FP-14DAV)  
SOP-14 pin (JEITA)  
FP  
EL (2,000 pcs/reel)  
Note: Please consult the sales office for the above package availability.  
Pin Arrangement  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1J  
1Q  
VCC  
J
CLR  
1CLR  
1CK  
2K  
Q
CK  
Q
1Q  
K
1K  
K
2Q  
Q
2CLR  
2CK  
2J  
CK  
Q
2Q  
J
CLR  
8
GND  
(Top view)  
Function Table  
Inputs  
Outputs  
Clear  
Clock  
J
X
L
K
X
L
Q
Q
H
L
X
L
QO  
H
H
H
H
H
H
QO  
L
H
L
L
H
H
X
L
H
H
X
Toggle  
H
QO  
QO  
Notes: H; high level, L; low level, X; irrelevant  
; transition from high to low level  
Q; level of Q before the indicated steady-state input conditions were established.  
Q; complement of QO or level of Q before the indicated steady-state input conditions were established.  
Toggle; each output changes to the complement of its previous level on each active transition indicated by .  
Rev.3.00, Jul.13.2005, page 1 of 6  

HD74LS107AP 替代型号

型号 品牌 替代类型 描述 数据表
SN54LS107AJ MOTOROLA

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