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HD74HCT573TELL PDF预览

HD74HCT573TELL

更新时间: 2024-11-23 05:35:15
品牌 Logo 应用领域
瑞萨 - RENESAS 总线驱动器总线收发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
10页 133K
描述
Octal Transparent Latches (with 3-state outputs)

HD74HCT573TELL 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:4.40 X 6.50 MM, 0.65 MM PITCH, PLASTIC, TSSOP-20针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.31.00.01风险等级:5.15
Is Samacsys:N系列:HCT
JESD-30 代码:R-PDSO-G20长度:6.5 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.006 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:28 ns传播延迟(tpd):28 ns
认证状态:Not Qualified座面最大高度:1.1 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

HD74HCT573TELL 数据手册

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HD74HCT563, HD74HCT573  
Octal Transparent Latches (with 3-state outputs)  
REJ03D0669–0200  
(Previous ADE-205-559)  
Rev.2.00  
Mar 30, 2006  
Description  
When the latch enable (LE) input is high, the Q outputs of HD74HCT563 will follow the inversion of the D inputs and  
the Q outputs of HD74HCT573 will follow the D inputs. When the latch enable goes low, data at the D inputs will be  
retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control  
input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of  
the storage elements.  
Features  
LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility  
High Speed Operation: tpd (Data to Q, Q) = 13 ns typ (CL = 50 pF)  
High Output Current: Fanout of 15 LSTTL Loads  
Wide Operating Voltage: VCC = 4.5 to 5.5 V  
Low Input Current: 1 µA max  
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
DILP-20 pin  
PRDP0020AC-B  
(DP-20NEV)  
HD74HCT573P  
P
HD74HCT563FPEL  
HD74HCT573FPEL  
PRSP0020DD-B  
(FP-20DAV)  
SOP-20 pin (JEITA)  
SOP-20 pin (JEDEC)  
TSSOP-20 pin  
FP  
RP  
T
EL (2,000 pcs/reel)  
EL (1,000 pcs/reel)  
ELL (2,000 pcs/reel)  
PRSP0020DC-A  
(FP-20DBV)  
HD74HCT563RPEL  
HD74HCT573TELL  
PTSP0020JB-A  
(TTP-20DAV)  
Note: Please consult the sales office for the above package availability.  
Function Table  
Inputs  
Outputs  
Output Control  
Latch Enable  
Data  
H
HD74HCT563  
HD74HCT573  
L
L
H
H
L
L
H
H
L
L
L
X
Q0  
Z
Q0  
Z
H
X
X
Q0 : level of Q before the indicated Steady-sate input conditions were established.  
Q0 : complement of Q0 or level of Q before the indicated Steady-state input conditions were established.  
Rev.2.00, Mar 30, 2006 page 1 of 9  

HD74HCT573TELL 替代型号

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