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HD74HCT541 PDF预览

HD74HCT541

更新时间: 2024-11-22 05:35:15
品牌 Logo 应用领域
瑞萨 - RENESAS 驱动器
页数 文件大小 规格书
9页 107K
描述
Octal Buffers/Line Drivers (with 3-state outputs)

HD74HCT541 数据手册

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HD74HCT540, HD74HCT541  
Octal Buffers/Line Drivers (with 3-state outputs)  
REJ03D0668–0200  
(Previous ADE-205-558)  
Rev.2.00  
Mar 30, 2006  
Description  
The HD74HCT540 is an inverting buffer and the HD74HCT541 is a non-inverting buffer. The 3-state control gate  
operates as a two-input NOR such that if either G1 or G2 are high, all eight outputs are in the high-impedance state.  
Features  
LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility  
High Speed Operation: tpd (A to Y) = 12 ns typ (CL = 50 pF)  
High Output Current: Fanout of 15 LSTTL Loads  
Wide Operating Voltage: VCC = 4.5 to 5.5 V  
Low Input Current: 1 µA max  
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
DILP-20 pin  
HD74HCT540P  
PRDP0020AC-B  
(DP-20NEV)  
P
HD74HCT541P  
HD74HCT540FPEL  
HD74HCT541FPEL  
PRSP0020DD-B  
(FP-20DAV)  
SOP-20 pin (JEITA)  
SOP-20 pin (JEDEC)  
TSSOP-20 pin  
FP  
RP  
T
EL (2,000 pcs/reel)  
EL (1,000 pcs/reel)  
ELL (2,000 pcs/reel)  
PRSP0020DC-A  
(FP-20DBV)  
HD74HCT541RPEL  
HD74HCT540TELL  
HD74HCT541TELL  
PTSP0020JB-A  
(TTP-20DAV)  
Note: Please consult the sales office for the above package availability.  
Function Table  
Inputs  
Output Y  
G1  
G2  
L
A
L
HD74HCT540  
HD74HCT541  
L
H
L
L
H
Z
Z
L
L
H
X
X
H
X
X
H
Z
Z
H : high level  
L
X
Z
:
:
:
low level  
irrelevant  
off (high-impedance) state of a 3-state output  
Rev.2.00 Mar 30, 2006 page 1 of 8  

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