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HD74HC573FP-EL PDF预览

HD74HC573FP-EL

更新时间: 2024-01-09 16:04:10
品牌 Logo 应用领域
日立 - HITACHI 锁存器
页数 文件大小 规格书
12页 73K
描述
Bus Driver, HC/UH Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, FP-20DA

HD74HC573FP-EL 技术参数

是否Rohs认证: 符合生命周期:Not Recommended
包装说明:TSSOP, TSSOP20,.25Reach Compliance Code:compliant
风险等级:5.63JESD-30 代码:R-PDSO-G20
负载电容(CL):50 pF逻辑集成电路类型:D LATCH
最大I(ol):0.006 A位数:8
功能数量:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL电源:2/6 V
Prop。Delay @ Nom-Sup:28 ns认证状态:Not Qualified
子类别:FF/Latches表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUALBase Number Matches:1

HD74HC573FP-EL 数据手册

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HD74HC563/HD74HC573  
Octal Transparent Latches (with 3-state outputs)  
Description  
When the latch enable (LE) input is high, the Q outputs of HD74HC563 will follow the inversion of the D  
inputs and the Q outputs of HD74HC573 will follow the D inputs. When the latch enable goes low, data at  
the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is  
applied to the output control input, all outputs go to a high impedance state, regardless of what signals are  
present at the other inputs and the state of the storage elements.  
Features  
High Speed Operation: tpd (Data to Q, Q) = 11 ns typ (CL = 50 pF)  
High Output Current: Fanout of 15 LSTTL Loads  
Wide Operating Voltage: VCC = 2 to 6 V  
Low Input Current: 1 µA max  
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)  
Function Table  
Outputs  
Output Control  
Latch Enable  
Data  
H
HD74HC563  
HD74HD573  
L
L
L
H
H
H
L
L
H
L
L
H
Q0  
Z
X
Q0  
Z
X
X
Q0 :  
Q0 :  
level of Q before the indicated Steady-sate input conditions were established.  
complement of Q0 or level of Q before the indicated Steady-state input conditions were established.  

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