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HD74HC534P-E PDF预览

HD74HC534P-E

更新时间: 2024-11-13 13:08:15
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瑞萨 - RENESAS 触发器
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9页 117K
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HD74HC534P-E 数据手册

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HD74HC374, HD74HC534  
Octal D-type Flip-Flops (with 3-state outputs)  
Octal D-type Flip-Flops (with inverted 3-state outputs)  
REJ03D0620-0200  
(Previous ADE-205-499)  
Rev.2.00  
Mar 30, 2006  
Description  
These devices are positive edge triggered flip-flops. The difference between HD74HC374 and HD74HC534 is only  
that the former is a true outputs and the latter is a false outputs. Data at the D inputs, meeting the setup and hold time  
requirements, are transferred to the Q outputs on positive going transitions of the clock (CK) input. When a high logic  
level is applied to the output control (OC) input, all outputs go to a high impedance state, regardless of what signals are  
present at the other inputs and the state of the storage elements.  
Features  
High Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 pF)  
High Output Current: Fanout of 15 LSTTL Loads  
Wide Operating Voltage: VCC = 2 to 6 V  
Low Input Current: 1 µA max  
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)  
Ordering Information  
Package Code  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
DILP-20 pin  
(Previous Code)  
PRDP0020AC-B  
(DP-20NEV)  
HD74HC374P  
P
HD74HC534P  
HD74HC374FPEL  
HD74HC534FPEL  
PRSP0020DD-B  
(FP-20DAV)  
SOP-20 pin (JEITA)  
SOP-20 pin (JEDEC)  
TSSOP-20 pin  
FP  
RP  
T
EL (2,000 pcs/reel)  
EL (1,000 pcs/reel)  
ELL (2,000 pcs/reel)  
PRSP0020DC-A  
(FP-20DBV)  
HD74HC534RPEL  
HD74HC374TELL  
PTSP0020JB-A  
(TTP-20DAV)  
Note: Please consult the sales office for the above package availability.  
Function Table  
HD74HC374  
Q
HD74HC534  
Output Control  
Clock  
D
H
L
Q
L
L
L
H
L
No change  
Z
H
No change  
Z
L
L
X
X
H
X
Note: 1. H; High level, L; Low level, X; Irrelevant, Z; High impedance  
Rev.2.00 Mar 30, 2006 page 1 of 8  

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