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HD74HC4024 PDF预览

HD74HC4024

更新时间: 2024-11-18 22:55:07
品牌 Logo 应用领域
日立 - HITACHI 计数器
页数 文件大小 规格书
8页 50K
描述
7-stage Binary Counter

HD74HC4024 数据手册

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HD74HC4024  
7-stage Binary Counter  
Description  
The HD74HC4024 is a 7-stage counter. This device is incremented on the falling edge (negative transition)  
of the input clock, and all its output is reset to a low level by applying a logical high on its reset input.  
Features  
High Speed Operation: tpd (Clock to Q1) = 14 ns typ (CL = 50 pF)  
High Output Current: Fanout of 10 LSTTL Loads  
Wide Operating Voltage: VCC = 2 to 6 V  
Low Input Current: 1 µA max  
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)  
Function Table  
Clock  
Reset  
Outputs State  
No change  
L
L
L
H
L
All outputs are low  
No change  
H
H
H
L
All outputs are low  
No change  
H
L
All outputs are low  
Advance to next state  
All outputs are low  
H

与HD74HC4024相关器件

型号 品牌 获取价格 描述 数据表
HD74HC4024FP ETC

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COUNTER|UP|7-BIT BINARY|HC-CMOS|SOP|14PIN|PLASTIC
HD74HC4024FP-E RENESAS

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HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 7-BIT UP BINARY COUNTER, PDSO14, FP-14DAV
HD74HC4024FPEL RENESAS

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7-stage Binary Counter
HD74HC4024FP-EL RENESAS

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HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 7-BIT UP BINARY COUNTER, PDSO14, FP-14DA
HD74HC4024FPEL-E RENESAS

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暂无描述
HD74HC4024P RENESAS

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7-stage Binary Counter
HD74HC4024RP ETC

获取价格

COUNTER|UP|7-BIT BINARY|HC-CMOS|SOP|14PIN|PLASTIC
HD74HC4024RPEL RENESAS

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7-stage Binary Counter
HD74HC4024RP-EL RENESAS

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HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 7-BIT UP BINARY COUNTER, PDSO14, FP-14DN
HD74HC4024T HITACHI

获取价格

Binary Counter, HC/UH Series, Asynchronous, Negative Edge Triggered, 7-Bit, Up Direction,