生命周期: | Contact Manufacturer | 零件包装代码: | SOIC |
包装说明: | TSSOP, | 针数: | 14 |
Reach Compliance Code: | compliant | HTS代码: | 8542.39.00.01 |
风险等级: | 5.17 | 系列: | HC |
JESD-30 代码: | R-PDSO-G14 | 长度: | 5 mm |
逻辑集成电路类型: | NAND GATE | 功能数量: | 3 |
输入次数: | 3 | 端子数量: | 14 |
最高工作温度: | 85 °C | 最低工作温度: | -40 °C |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | TSSOP |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH |
传播延迟(tpd): | 125 ns | 认证状态: | Not Qualified |
座面最大高度: | 1.1 mm | 最大供电电压 (Vsup): | 6 V |
最小供电电压 (Vsup): | 2 V | 标称供电电压 (Vsup): | 4.5 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | INDUSTRIAL | 端子形式: | GULL WING |
端子节距: | 0.65 mm | 端子位置: | DUAL |
宽度: | 4.4 mm | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
HD74HC11 | RENESAS |
获取价格 |
Triple 3-input AND Gates | |
HD74HC11 | HITACHI |
获取价格 |
Triple 3-input AND Gates | |
HD74HC112 | HITACHI |
获取价格 |
Dual J-K Flip-Flops (with Preset and Clear) | |
HD74HC112 | RENESAS |
获取价格 |
Dual J-K Flip-Flops (with Preset and Clear) | |
HD74HC112FP | HITACHI |
获取价格 |
J-K Flip-Flop, HC/UH Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, | |
HD74HC112FP | RENESAS |
获取价格 |
HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, FP | |
HD74HC112FP-E | RENESAS |
获取价格 |
HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, FP | |
HD74HC112FPEL | RENESAS |
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Dual J-K Flip-Flops (with Preset and Clear) | |
HD74HC112FP-EL | HITACHI |
获取价格 |
暂无描述 | |
HD74HC112FP-EL | RENESAS |
获取价格 |
暂无描述 |