HD74CDCV857

更新时间： 2024-10-04 22:37:03

品牌	Logo	应用领域
日立 - HITACHI		时钟驱动器
页数	文件大小	规格书
15页	63K
描述
2.5-V Phase-lock Loop Clock Driver

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HD74CDCV857 数据手册

HD74CDCV857

2.5-V Phase-lock Loop Clock Driver

ADE-205-335C (Z)

Preliminary

4th Edition

March 2000

Description

The HD74CDCV857 is a high-performance, low-skew, low-jitter, phase locked loop clock driver. It is

specifically designed for use with DDR (Double Data Rate) synchronous DRAMs.

Features

•

Supports 60 MHz to 200 MHz operation range

Distributes one differential clock input pair to ten differential clock outputs pairs

Supports spread spectrum clock requirements meeting the PC100 SDRAM registered DIMM

specification

•

External feedback pins (FBIN, FBIN) are used to synchronize the outputs to the clock input

Supports 2.5V analog supply voltage (AV_CC), and 2.5 V V_DDQ

No external RC network required

Sleep mode detection

48pin TSSOP (Thin Shrink Small Outline Package)

12 3 4 5 6 7...15

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型号	品牌	获取价格	描述	数据表
HD74CDCV857A	RENESAS	获取价格	2.5-V Phase-lock Loop Clock Driver
HD74CDCV857AT	RENESAS	获取价格	CDCV SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48, TSSO
HD74CDCV857AT	HITACHI	获取价格	PLL Based Clock Driver, CDCV Series, 10 True Output(s), 0 Inverted Output(s), PDSO48, TSSO
HD74CDCV857ATEL	RENESAS	获取价格	HD74CDCV857ATEL
HD74CDCV857TEL	RENESAS	获取价格	CDCV SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48, TSSO
HD74H183	HITACHI	获取价格	TTL HD74/HD74S Series
HD74H183P	HITACHI	获取价格	Adder/Subtractor, TTL, PDIP14
HD74HC00	HITACHI	获取价格	Quad. 2-input NAND Gates
HD74HC00	RENESAS	获取价格	Quad. 2-input NAND Gates
HD74HC00FP-E	RENESAS	获取价格	HC/UH SERIES, QUAD 2-INPUT NAND GATE, PDSO14, FP-14DA