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HD74AC280RP-EL PDF预览

HD74AC280RP-EL

更新时间: 2024-11-05 13:08:15
品牌 Logo 应用领域
日立 - HITACHI /
页数 文件大小 规格书
9页 55K
描述
Parity Generator/Checker, AC Series, 9-Bit, Complementary Output, CMOS, PDSO14, FP-14DN

HD74AC280RP-EL 数据手册

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HD74AC280/HD74ACT280  
9-bit Parity Generator/Checker  
Description  
The HD74AC280/HD74ACT280 is a high-speed parity generator/checker that accepts nine bits of input  
data and detects whether an even or an odd number of these inputs is High. If an even number of inputs is  
High, the Sum Even output is High. If an odd number is High, the Sum Even output is Low. The Sum Odd  
output is the complement of the Sum Even output.  
Features  
Outputs Source/Sink 24 mA  
HD74ACT280 has TTL-Cmpatible Inputs  
Pin Arrangement  
1
2
3
4
5
14 VCC  
13 I5  
I6  
I7  
NC  
I8  
12  
11  
I4  
I3  
ΣE  
10 I2  
ΣO 6  
9
8
I1  
I0  
GND 7  
(Top view)  

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