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HD74AC244TVELL PDF预览

HD74AC244TVELL

更新时间: 2024-01-30 07:03:46
品牌 Logo 应用领域
瑞萨 - RENESAS 驱动器
页数 文件大小 规格书
9页 123K
描述
AC SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20, LEAD FREE, TSSOP-20

HD74AC244TVELL 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:TSSOP包装说明:TSSOP,
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.5
系列:ACJESD-30 代码:R-PDSO-G20
长度:6.5 mm逻辑集成电路类型:BUS DRIVER
位数:4功能数量:2
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd):10 ns认证状态:Not Qualified
座面最大高度:1.1 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:4.4 mmBase Number Matches:1

HD74AC244TVELL 数据手册

 浏览型号HD74AC244TVELL的Datasheet PDF文件第2页浏览型号HD74AC244TVELL的Datasheet PDF文件第3页浏览型号HD74AC244TVELL的Datasheet PDF文件第4页浏览型号HD74AC244TVELL的Datasheet PDF文件第5页浏览型号HD74AC244TVELL的Datasheet PDF文件第6页浏览型号HD74AC244TVELL的Datasheet PDF文件第7页 
HD74AC244/HD74ACT244  
Octal Buffer/Line Driver with 3-State Output  
REJ03D0262–0200Z  
(Previous ADE-205-383 (Z))  
Rev.2.00  
Jul.16.2004  
Description  
The HD74AC244/HD74ACT244 is an octal buffer and line driver designed to be employed as a memory address driver,  
clock driver and bus-oriented transmitter/receive which provides improved PC board density.  
Features  
3-State Outputs Drive Bus Lines or Buffer Memory Address Registers  
Outputs Source/Sink 24 mA  
HD74ACT244 has TTL-Compatible Inputs  
Ordering Information: Ex. HD74AC244  
Part Name  
HD74AC244P  
Package Type  
DIP-20 pin  
Package Code Package Abbreviation Taping Abbreviation (Quantity)  
DP-20N, -20NEV P  
HD74AC244FPEL SOP-20 pin (JEITA) FP-20DAV  
HD74AC244RPEL SOP-20 pin (JEDEC) FP-20DBV  
FP  
RP  
T
EL (2,000 pcs/reel)  
EL (1,000 pcs/reel)  
ELL (2,000 pcs/reel)  
HD74AC244TELL TSSOP-20 pin  
TTP-20DAV  
Notes: 1. Please consult the sales office for the above package availability.  
2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of  
the package code.  
Pin Arrangement  
1
2
OE1  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
VCC  
20  
19  
OE2  
3
18 1Y1  
17 2A4  
4
1Y2  
16  
5
2A3  
1Y3  
2A2  
1Y4  
15  
14  
13  
12  
6
7
8
9
11 2A1  
10  
(Top view)  
Rev.2.00, Jul.16.2004, page 1 of 8  

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