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HD3-6408-9 PDF预览

HD3-6408-9

更新时间: 2024-11-07 20:14:11
品牌 Logo 应用领域
瑞萨 - RENESAS 编码器电信光电二极管电信集成电路
页数 文件大小 规格书
11页 57K
描述
CMOS Asynchronous Serial Manchester Adapter (ASMA); CERDIP24, PDIP24; Temp Range: -40° to 85°C

HD3-6408-9 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:CERDIP, PDIP包装说明:PLASTIC, DIP-24
针数:24, 24Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.91
Is Samacsys:NJESD-30 代码:R-PDIP-T24
JESD-609代码:e0功能数量:1
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP24,.6
封装形状:RECTANGULAR封装形式:IN-LINE
电源:5 V认证状态:Not Qualified
子类别:Network Interfaces最大压摆率:10 mA
标称供电电压:5 V表面贴装:NO
技术:CMOS电信集成电路类型:MANCHESTER ENCODER/DECODER
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUALBase Number Matches:1

HD3-6408-9 数据手册

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HD-6408  
CMOS Asynchronous Serial  
Manchester Adapter (ASMA)  
March 1997  
Features  
Description  
• Low Bit Error Rate  
The HD-6408 is a CMOS/LSI Manchester Encoder/Decoder  
for creating a very high speed asynchronous serial data bus.  
The Encoder converts serial NRZ data (typically from a shift  
register) to Manchester II encoded data, adding a sync pulse  
and parity bit. The Decoder recognizes this sync pulse and  
identifies it as a Command Sync or a Data Sync. The data is  
then decoded and shifted out in NRZ code (typically into a  
shift register). Finally, the parity bit is checked. If there were  
no Manchester or parity errors the Decoder responds with a  
valid word signal. The Decoder puts the Manchester code to  
full use to provide clock recovery and excellent noise immu-  
nity at these very high speeds.  
• Data Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1MBit/s  
• Sync Identification and Lock-In  
• Clock Recovery  
• Manchester II Encoder, Decoder  
• Separate Encode and Decode  
• Low Operating Power . . . . . . . . . . . . . . . . . 50mW at 5V  
• Single Power Supply  
• 24 Lead Package  
The HD-6408 can be used in many commercial applications  
such as security systems, environmental control systems,  
serial data links and many others. It utilizes a single 12 x  
clock and achieves data rates of up to one million bits per  
second with a very minimum overhead of only 4 bits out of  
20, leaving 16 bits for data.  
Ordering Information  
PART  
NUMBER  
PKG.  
NO.  
PACKAGE  
PDIP  
TEMP. RANGE  
o
o
-40 C to +85 C  
HD3-6408-9  
HD1-6408-9  
E24.6  
E24.6  
o
o
CERDIP  
-40 C to +85 C  
Pinout  
HD-6408 (DIP)  
TOP VIEW  
VW  
ESC  
TD  
1
2
3
4
5
6
7
8
9
24  
V
CC  
23 EC  
22 SCI  
21 SD  
20 SS  
SDO  
DC  
BZI  
19 EE  
BOI  
UDI  
DSC  
18 SDI  
17 BOO  
16 OI  
CDS 10  
DR 11  
15 BZO  
14 DBS  
13 MR  
GND 12  
d
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 2952.1  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 19995-1  

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