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HD14702883B PDF预览

HD14702883B

更新时间: 2024-09-23 14:50:47
品牌 Logo 应用领域
瑞萨 - RENESAS 时钟外围集成电路晶体
页数 文件大小 规格书
8页 194K
描述
2.4576MHz, OTHER CLOCK GENERATOR, CDIP16, CERDIP-16

HD14702883B 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:CERDIP-16针数:16
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.78
Is Samacsys:NJESD-30 代码:R-GDIP-T16
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C最大输出时钟频率:2.4576 MHz
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
主时钟/晶体标称频率:2.4576 MHz认证状态:Not Qualified
筛选级别:MIL-STD-883 Class B座面最大高度:5.08 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:7.62 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

HD14702883B 数据手册

 浏览型号HD14702883B的Datasheet PDF文件第2页浏览型号HD14702883B的Datasheet PDF文件第3页浏览型号HD14702883B的Datasheet PDF文件第4页浏览型号HD14702883B的Datasheet PDF文件第5页浏览型号HD14702883B的Datasheet PDF文件第6页浏览型号HD14702883B的Datasheet PDF文件第7页 
TM  
HD-4702/883  
June 1998  
CMOS Programmable Bit Rate Generator  
Features  
Description  
• This Circuit is Processed in Accordance to MIL-STD-883  
and is Fully Conformant Under the Provisions of  
Paragraph 1. 2. 1.  
The HD-4702/883 Bit Rate Generator provides the  
necessary clock signals for digital data transmission sys-  
tems, such as a UART. It generates 13 commonly used bit  
rates using an on-chip crystal oscillator or an external input.  
For conventional operation generating 16 output clock  
pulses per bit period, the input clock frequency must be  
2.4576MHz (i.e., 9600 Baud x 16 x 16, since there is an  
internal ÷ 16 prescaler). A lower input frequency will result in  
a proportionally lower output frequency.  
• HD-4702/883 Provides 13 Commonly Used Bit Rates  
• Uses a 2.4576MHz Crystal/Input for Standard  
Frequency Output (16 Times Bit Rate)  
• Low Power Dissipation  
• Conforms to ElA RS-404  
The HD-4702/883 can provide multi-channel operation with  
a minimum of external logic by having the clock frequency  
• One HD-4702/883 Controls up to Eight Transmission  
Channels  
C
and the ÷ 8 prescaler outputs Q , Q , Q available  
O
0 1 2  
externally. All signals have a 50% duty cycle except 1800  
Baud, which has less than 0.39% distortion.  
• Initialization Circuit Facilitates Diagnostic Fault  
Isolation  
The four rate select inputs (S -S ) select which bit rate is at  
0
3
• On-Chip Input Pull-Up Circuit  
the output (Z). See Truth Table for Rate Select Inputs for  
select code and output bit rate. Two of the 16 select codes  
for the HD-4702/883 do not select an internally generated  
frequency, but select an input into which the user can feed  
either a different frequency, or a static level (High or Low) to  
generate “ZERO BAUD”.  
Ordering Information  
PART  
NUMBER  
TEMPERATURE  
RANGE ( C)  
o
PACKAGE  
PKG. NO.  
HD1-4702/883  
-55 to 125  
CERDIP  
F16.3  
The bit rates most commonly used in modern data terminals  
(110,150, 300,1200, 2400 Baud) require that no more than  
one input be grounded for the HD-4702/883, which is easily  
achieved with a single 5-position switch.  
The HD-4702/883 has an initialization circuit which  
generates a master reset for the scan counter. This signal is  
derived from a digital differentiator that senses the first high  
level on the C input after the E  
input goes low. When  
P
CP  
E
is high, selecting the crystal input, C must be low. A  
CP  
P
high level on C would apply a continuous reset. See Clock  
P
Modes and Initialization below.  
Pinout  
HD-4702/883 (CERDIP)  
TOP VIEW  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Q
V
I
CC  
0
Q
Q
1
2
M
S
S
S
S
Z
0
1
2
3
E
CP  
C
P
O
X
X
I
GND  
C
O
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.  
FN2955.2  
Copyright © Intersil Americas Inc. 2002. All Rights Reserved  
1

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