5秒后页面跳转
捷配首页

Datasheet > HD1-4702-9
HD1-4702-9 PDF预览

HD1-4702-9

更新时间： 2024-09-23 19:41:35
品牌 Logo 应用领域
瑞萨 - RENESAS 时钟外围集成电路晶体
页数 文件大小 规格书
7页 82K
描述
2.4576MHz, OTHER CLOCK GENERATOR, CDIP16, CERDIP-16

阅读下载

中文翻译

获取价格

HD1-4702-9 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：DIP包装说明：CERDIP-16
针数：16Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.9JESD-30 代码：R-GDIP-T16
JESD-609代码：e0端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
最大输出时钟频率：2.4576 MHz封装主体材料：CERAMIC, GLASS-SEALED
封装代码：DIP封装等效代码：DIP16,.3
封装形状：RECTANGULAR封装形式：IN-LINE
电源：5 V主时钟/晶体标称频率：2.4576 MHz
认证状态：Not Qualified座面最大高度：5.08 mm
子类别：Other Microprocessor ICs最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL宽度：7.62 mm
uPs/uCs/外围集成电路类型：CLOCK GENERATOR, OTHERBase Number Matches：1

HD1-4702-9 数据手册

 浏览型号HD1-4702-9的Datasheet PDF文件第2页浏览型号HD1-4702-9的Datasheet PDF文件第3页浏览型号HD1-4702-9的Datasheet PDF文件第4页浏览型号HD1-4702-9的Datasheet PDF文件第5页浏览型号HD1-4702-9的Datasheet PDF文件第6页浏览型号HD1-4702-9的Datasheet PDF文件第7页 
TM  
HD-4702  
March 1997  
CMOS Programmable Bit Rate Generator  
Features  
Description  
The HD-4702 Bit Rate Generator provides the necessary clock  
signals for digital data transmission systems, such as a UART. It  
generates 13 commonly used bit rates using an on-chip crystal  
oscillator or an external input. For conventional operation gener-  
ating 16 output clock pulses per bit period, the input clock fre-  
quency must be 2.4576MHz (i.e. 9600 Baud x 16 x 16, since  
there is an internal ÷ 16 prescaler). A lower input frequency will  
result in a proportionally lower output frequency.  
• HD-4702 Provides 13 Commonly Used Bit Rates  
• Uses a 2.4576MHz Crystal/Input for Standard  
Frequency Output (16 Times Bit Rate)  
• Low Power Dissipation  
• Conforms to EIA RS-404  
• One HD-4702 Controls up to Eight Transmission  
Channels  
The HD-4702 can provide multi-channel operation with a mini-  
mum of external logic by having the clock frequency CO and the  
÷ 8 prescaler outputs Q0, Q1, Q2 available externally. All signals  
have a 50% duty cycle except 1800 Baud, which has less than  
0.39% distortion.  
• Initialization Circuit Facilitates Diagnostic Fault  
Isolation  
• On-Chip Input Pull-Up Circuit  
The four rate select inputs (S0-S3) select which bit rate is at the  
output (Z). See Truth Table for Rate Select Inputs for select code  
and output bit rate. Two of the 16 select codes for the HD-4702 do  
not select an internally generated frequency, but select an input  
into which the user can feed either a different frequency, or a  
static level (High or Low) to generate “ZERO BAUD”.  
Ordering Information  
TEMP.  
o
PACKAGE  
PDIP  
RANGE ( C)  
-40 to +85  
PART NUMBER  
HD3-4702-9  
PKG. NO.  
E16.3  
F16.3  
The bit rates most commonly used in modern data terminals  
(110, 150, 300, 1200, 2400 Baud) require that no more than one  
input be grounded for the HD-4702, which is easily achieved with  
a single 5-position switch.  
CERDIP  
SMD#  
-40 to +85  
-55 to +125  
HD1-4702-9  
5962-9051801MEA F16.3  
The HD-4702 has an initialization circuit which generates a mas-  
ter reset for the scan counter. This signal is derived from a digital  
differentiator that senses the first high level on the CP input after  
the E  
input goes low. When E  
is high, selecting the crystal  
CP  
CP  
input, CP must be low. A high level on CP would apply a continu-  
ous reset. See Clock Modes and Initialization below.  
Truth Table  
Pinout  
TRUTH TABLE FOR RATE SELECT INPUTS  
HD-4702 (CERDIP, PDIP)  
(Using 2.4576MHz Crystal)  
TOP VIEW  
S3  
S2  
S1  
S0  
OUTPUT RATE (Z)  
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
L
H
H
L
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
MUX Input (IM)  
MUX Input (IM)  
50 Baud  
75 Baud  
134.5 Baud  
200 Baud  
Q0  
Q1  
Q2  
1
2
3
4
5
6
7
8
16 V  
CC  
15 I  
M
L
14 S0  
13 S1  
12 S2  
11 S3  
10 Z  
H
H
H
H
L
L
L
L
H
H
H
H
E
CP  
L
CP  
H
H
L
600 Baud  
2400 Baud  
9600 Baud  
4800 Baud  
1800 Baud  
1200 Baud  
2400 Baud  
300 Baud  
O
X
I
X
L
H
H
L
L
H
H
9
CO  
GND  
150 Baud  
110 Baud  
NOTE: 19200 Baud by connecting Q2 to IM.  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.  
FN2954.1  
Copyright © Intersil Americas Inc. 2002. All Rights Reserved  
1
1234567

中文翻译

下载PDF

与HD1-4702-9相关器件

型号 品牌 获取价格 描述 数据表
HD1-4702-9+ RENESAS

获取价格

 		IC,BAUD RATE GENERATOR,CMOS,DIP,16PIN,CERAMIC
HD1-4702A-9 RENESAS

获取价格

 		IC,BAUD RATE GENERATOR,CMOS,DIP,16PIN,CERAMIC
HD1-4702R/883 RENESAS

获取价格

 		HD1-4702R/883
HD1-4702R-9 RENESAS

获取价格

 		IC,BAUD RATE GENERATOR,CMOS,DIP,16PIN,CERAMIC
HD15 TELEDYNE

获取价格

 		High Voltage Divider Set, Thick film,Non-Inductive R1 & R2
HD-15003S HRS

获取价格

 		90 Degree Hybrid Coupler, 800MHz Min, 2300MHz Max, CERAMIC, SMT, 8 PIN
HD-15003S(06) HRS

获取价格

 		90 Degree Hybrid Coupler, 1400MHz Min, 1600MHz Max
HD-15003S-06 HRS

获取价格

 		1400 MHz - 1600 MHz RF/MICROWAVE 90 DEGREE HYBRID COUPLER
HD1500C000J0G AMPHENOL

获取价格

 		Barrier Strip Terminal Block
HD-1500M(10DB) HRS

获取价格

 		Directional Coupler, 1400MHz Min, 1600MHz Max, 0.5dB Insertion Loss-Max

与HD1-4702-9相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证