Datasheet > HCS12XDFAMILYPP

HCS12XDFAMILYPP

更新时间： 2024-09-23 23:55:07

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HCS12 XD-Family Product Brief

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HCS12XDFAMILYPP 数据手册

MC9S12XD-FamilyPP

Rev 2.3, 9-Jun-04

Freescale Semiconductor, Inc.

MOTOROLA

SEMICONDUCTOR

TECHNICAL DATA

MC9S12XD-Family

Product Brief

NeXt Generation 16-Bit Microcontroller Family

Targeted at automotive multiplexing applications, the MC9S12X MCU family will deliver 32-bit

performance with all the advantages and efficiencies of a 16 bit MCU. The design goal is to retain the

low cost, power consumption, EMC and code-size efficiency advantages currently enjoyed by users of

Motorola's existing 16-Bit MC9S12 MCU family.

Based around an enhanced S12 core, the MC9S12XD-Family will deliver 2 to 5 times the performance

of a 25MHz S12 whilst retaining a high degree of pin and code compatibility with the S12.

The MC9S12XD-Family introduces the performance boosting XGATE module. Using enhanced DMA

functionality, this parallel processing module offloads the CPU by providing high speed data processing

and transfer between peripheral modules, RAM and I/O ports. Providing up to 80MIPS of performance

additional to the CPU, the XGATE can handle 64 channels and is fully user programmable.

The MC9S12XD-Family will feature the enhanced MXCAN module which, when used in conjunction

with XGATE, delivers FULL CAN performance with virtually unlimited number of mailboxes and retains

backwards compatibility with the MSCAN module featured on existing S12 products.

Memory options will initially range from 128K to 1MByte of Motorola's industry-leading, full automotive

spec SG-Flash with additional integrated EEPROM. In addition to the rich S12 peripheral set, the

MC9S12XD-Family will feature more RAM, extra A/D channels, new timer features and additional

LIN-compatible SCI ports compared with the S12 D-Family. The MC9S12XD-Family also features a

new flexible interrupt handler which allows multilevel nested interrupts.

The MC9S12XD-Family has full 16-bit data paths throughout. The non-multiplexed expanded bus

interface available on the 144-Pin versions allows an easy interface to external memories. The inclusion

of a PLL circuit allows power consumption and performance to be adjusted to suit operational

requirements. System power consumption is further improved with the new “fast exit from STOP mode”

feature and an ultra low power wake-up timer.

In addition to the I/O ports available in each module, up to 25 further I/O ports are available with interrupt

capability allowing Wake-Up from STOP or WAIT mode.

The MC9S12XD-Family will be available in 144-Pin LQFP (with optional external bus), 112-Pin or

80-Pin options.

Feature Detail

• 16-Bit CPU (Enhanced S12 Core – CPU12)

— Additional (superset) instructions to improve 32 bit calculations and semaphore handling

— Now possible to access large data segments independent of PPAGE

• New XGATE Module

— Programmable, high performance DMA module – up to 80 MIPS RISC performance

— Transfers data to or from all peripherals and RAM without CPU intervention or CPU wait states

— Can perform simple operations on data (logical, shifts, arithmetic, bit operations)

PRODUCT BRIEF - SUBJECT TO CHANGE

For More Information On This Product,

Go to: www.freescale.com

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