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HCS04K/SAMPLE PDF预览

HCS04K/SAMPLE

更新时间: 2024-01-06 20:36:56
品牌 Logo 应用领域
瑞萨 - RENESAS 输入元件逻辑集成电路
页数 文件大小 规格书
8页 106K
描述
HC/UH SERIES, HEX 1-INPUT INVERT GATE, CDFP14, CERAMIC, DFP-14

HCS04K/SAMPLE 技术参数

生命周期:Obsolete零件包装代码:DFP
包装说明:DFP,针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.66系列:HC/UH
JESD-30 代码:R-CDFP-F14长度:9.525 mm
逻辑集成电路类型:INVERTER功能数量:6
输入次数:1端子数量:14
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:DFP
封装形状:RECTANGULAR封装形式:FLATPACK
传播延迟(tpd):20 ns认证状态:Not Qualified
座面最大高度:5.08 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
端子形式:FLAT端子节距:2.54 mm
端子位置:DUAL宽度:7.62 mm
Base Number Matches:1

HCS04K/SAMPLE 数据手册

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HCS04MS  
Radiation Hardened  
Hex Inverter  
August 1995  
Features  
Pinouts  
14 LEAD CERAMIC DUAL-IN-LINE  
METAL SEAL PACKAGE (SBDIP)  
MIL-STD-1835 CDIP2-T14  
TOP VIEW  
• 3 Micron Radiation Hardened SOS CMOS  
• Total Dose 200K RAD (Si)  
• SEP Effective LET No Upsets: >100 MEV-cm2/mg  
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day  
(Typ)  
A1  
Y1  
1
2
3
4
5
6
7
14 VCC  
13 A6  
12 Y6  
11 A5  
10 Y5  
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s  
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse  
• Cosmic Ray Upset Immunity < 2 x 10-9 Errors/Gate Day  
A2  
Y2  
(Typ)  
A3  
• Latch-Up Free Under Any Conditions  
• Military Temperature Range: -55oC to +125oC  
• Significant Power Reduction Compared to LSTTL ICs  
• DC Operating Voltage Range: 4.5V to 5.5V  
• Input Logic Levels  
Y3  
9
8
A4  
Y4  
GND  
14 LEAD CERAMIC METAL SEAL  
FLATPACK PACKAGE (FLATPACK)  
MIL-STD-1835 CDFP3-F14  
TOP VIEW  
- VIL = 30% of VCC Max  
- VIH = 70% of VCC Min  
• Input Current Levels Ii 5µA at VOL, VOH  
A1  
Y1  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
VCC  
A6  
Y6  
Description  
A2  
The Intersil HCS04MS is a Radiation Hardened Hex Inverter. A  
logic level on any input forces the output to the opposite logic  
state.  
Y2  
A5  
Y5  
A3  
Y3  
A4  
Y4  
The HCS04MS utilizes advanced CMOS/SOS technology to  
achieve high-speed operation. This device is a member of  
radiation hardened, high-speed, CMOS/SOS Logic Family.  
GND  
8
TRUTH TABLE  
The HCS04MS is supplied in a 14 lead Ceramic flatpack (K suffix)  
or a SBDIP Package (D suffix).  
INPUTS  
OUTPUTS  
An  
L
Yn  
H
Ordering Information  
PART  
TEMPERATURE SCREENING  
RANGE LEVEL  
NUMBER  
PACKAGE  
H
L
o
o
HCS04DMSR  
HCS04KMSR  
-55 C to +125 C Intersil Class  
S Equivalent  
14 Lead SBDIP  
NOTE: L = Logic Level Low,  
H = Logic level High  
o
o
-55 C to +125 C Intersil Class  
S Equivalent  
14 Lead Ceramic  
Flatpack  
Functional Diagram  
o
HCS04D/  
Sample  
+25 C  
Sample  
Sample  
Die  
14 Lead SBDIP  
An  
Yn  
(2, 4, 6, 8, 10, 12)  
(1, 3, 5, 9, 11, 13)  
o
HCS04K/  
Sample  
+25 C  
14 Lead Ceramic  
Flatpack  
o
HCS04HMSR  
+25 C  
Die  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Spec Number 518745  
File Number 3046.1  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
25  

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