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HCPL2731VM PDF预览

HCPL2731VM

更新时间: 2024-11-08 13:08:11
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电输出元件
页数 文件大小 规格书
15页 205K
描述
2 CHANNEL LOGIC OUTPUT OPTOCOUPLER

HCPL2731VM 技术参数

生命周期:ActiveReach Compliance Code:unknown
风险等级:5.67配置:SEPARATE, 2 CHANNELS
最大正向电流:0.02 A最大绝缘电压:5000 V
元件数量:2最大通态电流:0.06 A
最高工作温度:100 °C最低工作温度:-40 °C
光电设备类型:LOGIC IC OUTPUT OPTOCOUPLERBase Number Matches:1

HCPL2731VM 数据手册

 浏览型号HCPL2731VM的Datasheet PDF文件第2页浏览型号HCPL2731VM的Datasheet PDF文件第3页浏览型号HCPL2731VM的Datasheet PDF文件第4页浏览型号HCPL2731VM的Datasheet PDF文件第5页浏览型号HCPL2731VM的Datasheet PDF文件第6页浏览型号HCPL2731VM的Datasheet PDF文件第7页 
April 2007  
Single-Channel: 6N138, 6N139  
Dual-Channel: HCPL2730, HCPL2731  
Low Input Current High Gain Split  
Darlington Optocouplers  
tm  
Features  
Description  
Low current – 0.5mA  
The 6N138/9 and HCPL2730/HCPL2731 optocouplers  
consist of an AlGaAs LED optically coupled to a high  
gain split darlington photodetector.  
Superior CTR-2000%  
Superior CMR-10kV/µs  
CTR guaranteed 0–70°C  
U.L. recognized (File # E90700)  
The split darlington configuration separating the input  
photodiode and the first stage gain from the output  
transistor permits lower output saturation voltage and  
higher speed operation than possible with conventional  
darlington phototransistor optocoupler. In the dual  
channel devices, HCPL2730/HCPL2731, an integrated  
emitter-base resistor provides superior stability over  
temperature.  
VDE recognized (File # 120915) Ordering option V,  
e.g., 6N138V  
Dual Channel – HCPL2730, HCPL2731  
Applications  
Digital logic ground isolation  
Telephone ring detector  
EIA-RS-232C line receiver  
High common mode noise line receiver  
µP bus isolation  
The combination of a very low input current of 0.5mA  
and a high current transfer ratio of 2000% makes this  
family particularly useful for input interface to MOS,  
CMOS, LSTTL and EIA RS232C, while output compati-  
bility is ensured to CMOS as well as high fan-out TTL  
requirements. An internal noise shield provides excep-  
tional common mode rejection of 10 kV/µs.  
Current loop receiver  
Schematic  
Package  
VCC  
VCC  
N/C  
1
8
+
1
8
8
VF1  
_
1
VB  
+
V01  
2
3
4
7
6
5
2
3
7
6
5
VF  
_
_
VO  
V02  
8
VF2  
8
GND  
GND  
N/C  
+
4
1
1
6N138 / 6N139  
HCPL2730 / HCPL2731  
©2005 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3  

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