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HCPL2611SV PDF预览

HCPL2611SV

更新时间: 2024-11-04 04:42:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电输出元件
页数 文件大小 规格书
12页 322K
描述
High Speed 10MBit/s Logic Gate Optocouplers

HCPL2611SV 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:DIP
包装说明:SURFACE MOUNT, DIP-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8541.40.80.00风险等级:8.41
其他特性:CMOS COMPATIBLE, OPEN COLLECTOR, UL RECOGNIZED, VDE APPROVED配置:SINGLE
标称数据速率:10 MBps最大正向电流:0.05 A
最大绝缘电压:2500 V元件数量:1
最大通态电流:0.05 A最高工作温度:85 °C
最低工作温度:-40 °C光电设备类型:LOGIC IC OUTPUT OPTOCOUPLER
最小供电电压:4.5 VBase Number Matches:1

HCPL2611SV 数据手册

 浏览型号HCPL2611SV的Datasheet PDF文件第2页浏览型号HCPL2611SV的Datasheet PDF文件第3页浏览型号HCPL2611SV的Datasheet PDF文件第4页浏览型号HCPL2611SV的Datasheet PDF文件第5页浏览型号HCPL2611SV的Datasheet PDF文件第6页浏览型号HCPL2611SV的Datasheet PDF文件第7页 
August 2008  
Single-Channel: 6N137, HCPL2601, HCPL2611  
Dual-Channel: HCPL2630, HCPL2631  
High Speed 10MBit/s Logic Gate Optocouplers  
Features  
Description  
Very high speed – 10 MBit/s  
Superior CMR – 10 kV/µs  
Double working voltage-480V  
Fan-out of 8 over -40°C to +85°C  
Logic gate output  
Strobable output  
Wired OR-open collector  
U.L. recognized (File # E90700)  
The 6N137, HCPL2601, HCPL2611 single-channel and  
HCPL2630, HCPL2631 dual-channel optocouplers  
consist of a 850 nm AlGaAS LED, optically coupled to a  
very high speed integrated photo-detector logic gate with  
a strobable output. This output features an open collec-  
tor, thereby permitting wired OR outputs. The coupled  
parameters are guaranteed over the temperature range  
of -40°C to +85°C. A maximum input signal of 5mA will  
provide a minimum output sink current of 13mA (fan out  
of 8).  
Applications  
Ground loop elimination  
An internal noise shield provides superior common  
mode rejection of typically 10kV/µs. The HCPL2601 and  
HCPL2631 has a minimum CMR of 5kV/µs. The  
HCPL2611 has a minimum CMR of 10kV/µs.  
LSTTL to TTL, LSTTL or 5-volt CMOS  
Line receiver, data transmission  
Data multiplexing  
Switching power supplies  
Pulse transformer replacement  
Computer-peripheral interface  
Schematics  
Package Outlines  
8
VCC  
N/C  
+
1
8
VCC  
8
+
1
1
VF1  
_
VE  
2
3
7
6
5
V01  
2
3
7
6
5
VF  
_
8
8
_
VO  
V02  
1
1
VF2  
+
GND  
N/C  
4
GND  
Truth Table (Positive Logic)  
4
Input  
Enable  
Output  
H
L
H
H
L
H
H
H
L
6N137  
HCPL2601  
HCPL2611  
HCPL2630  
HCPL2631  
H
L
L
L
(1)  
A 0.1µF bypass capacitor must be connected between pins 8 and 5  
.
H
L
NC  
NC  
H
©2005 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.7  

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