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HCPL0630V PDF预览

HCPL0630V

更新时间: 2024-11-25 13:08:11
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电
页数 文件大小 规格书
17页 289K
描述
Logic IC Output Optocoupler, 2-Element, 3750V Isolation, 10MBps, SOP-8

HCPL0630V 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SOP-8Reach Compliance Code:compliant
HTS代码:8541.40.80.00风险等级:5.26
其他特性:UL RECOGNIZED配置:SEPARATE, 2 CHANNELS
标称数据速率:10 MBps最大正向电流:0.1 A
最大绝缘电压:3750 VJESD-609代码:e3
安装特点:SURFACE MOUNT元件数量:2
最大通态电流:0.05 A最高工作温度:85 °C
最低工作温度:-40 °C光电设备类型:LOGIC IC OUTPUT OPTOCOUPLER
最大功率耗散:0.17 W标称响应时间:1e-7 ns
子类别:Optocoupler - IC Outputs最小供电电压:4.5 V
标称供电电压:5.5 V表面贴装:YES
端子面层:Matte Tin (Sn)Base Number Matches:1

HCPL0630V 数据手册

 浏览型号HCPL0630V的Datasheet PDF文件第2页浏览型号HCPL0630V的Datasheet PDF文件第3页浏览型号HCPL0630V的Datasheet PDF文件第4页浏览型号HCPL0630V的Datasheet PDF文件第5页浏览型号HCPL0630V的Datasheet PDF文件第6页浏览型号HCPL0630V的Datasheet PDF文件第7页 
July 2005  
HCPL0600, HCPL0601, HCPL0611,  
HCPL0630, HCPL0631, HCPL0661  
High Speed-10 MBit/s Logic Gate Optocouplers  
Single Channel: HCPL0600, HCPL0601, HCPL0611  
Dual Channel: HCPL0630, HCPL0631, HCPL0661  
Switching power supplies  
Features  
Compact SO8 package  
Pulse transformer replacement  
Computer-peripheral interface  
Very high speed-10 MBit/s  
Superior CMR  
Description  
Fan-out of 8 over -40°C to +85°C  
The HCPL06XX optocouplers consist of an AlGaAS LED, opti-  
cally coupled to a very high speed integrated photo-detector  
logic gate with a strobable output (single channel devices). The  
devices are housed in a compact small-outline package. This  
output features an open collector, thereby permitting wired OR  
outputs. The HCPL0600 and HCPL0601 output consists of  
bipolar transistors on a bipolar process while the HCPL0611,  
HCPL0630 and HCPL0631 output consists of bipolar transistors  
on a CMOS process for reduced power consumption. The cou-  
pled parameters are guaranteed over the temperature range of -  
40°C to +85°C. A maximum input signal of 5 mA will provide a  
minimum output sink current of 13 mA (fan out of 8). An internal  
noise shield provides superior common mode rejection.  
Logic gate output  
Strobable output (single channel devices)  
Wired OR-open collector  
U.L. recognized (File # E90700)  
VDE approval pending  
Applications  
Ground loop elimination  
LSTTL to TTL, LSTTL or 5-volt CMOS  
Line receiver, data transmission  
Data multiplexing  
Package Dimensions  
0.164 (4.16)  
0.144 (3.66)  
Pin 1  
0.202 (5.13)  
0.182 (4.63)  
0.019 (0.48)  
0.010 (0.25)  
0.006 (0.16)  
0.143 (3.63)  
0.123 (3.13)  
0.244 (6.19)  
0.224 (5.69)  
0.008 (0.20)  
0.003 (0.08)  
0.021 (0.53)  
0.011 (0.28)  
0.050 (1.27)  
TYP  
Lead Coplanarity : 0.004 (0.10) MAX  
NOTE  
All dimensions are in inches (millimeters)  
©2005 Fairchild Semiconductor Corporation  
1
www.fairchildsemi.com  
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1  

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