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HCPL-7840#300E PDF预览

HCPL-7840#300E

更新时间： 2024-11-04 14:50:47
品牌 Logo 应用领域
安华高科 - AVAGO 放大器分离技术隔离技术光电二极管
页数 文件大小 规格书
19页 146K
描述
ISOLATION AMPLIFIER, 3750V ISOLATION-MIN, 100kHz BAND WIDTH, PDSO8, LEAD FREE, SMT-8

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HCPL-7840#300E 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP, GWDIP8,.4针数：8
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.33.00.01风险等级：5.06
Is Samacsys：N放大器类型：ISOLATION AMPLIFIER
标称带宽 (3dB)：100 MHz最大共模电压：2.8 V
最小绝缘电压：3750 VJESD-30 代码：R-PDSO-G8
JESD-609代码：e3长度：9.8 mm
湿度敏感等级：1功能数量：1
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：GWDIP8,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260电源：5 V
认证状态：Not Qualified座面最大高度：4.455 mm
子类别：Isolation Amplifiers最大压摆率：15.5 mA
供电电压上限：5.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：40
最大电压增益：8.4最小电压增益：7.6
宽度：6.35 mmBase Number Matches：1

HCPL-7840#300E 数据手册

 浏览型号HCPL-7840#300E的Datasheet PDF文件第2页浏览型号HCPL-7840#300E的Datasheet PDF文件第3页浏览型号HCPL-7840#300E的Datasheet PDF文件第4页浏览型号HCPL-7840#300E的Datasheet PDF文件第5页浏览型号HCPL-7840#300E的Datasheet PDF文件第6页浏览型号HCPL-7840#300E的Datasheet PDF文件第7页 
HCPL-7840  
Isolation Amplifier  
Data Sheet  
Lead (Pb) Free  
RoHS 6 fully  
compliant  
RoHS 6 fully compliant options available;  
-xxxE denotes a lead-free product  
Description  
Features  
1ꢀ kV/μs common-mode rejection at VCM = 1000 V  
Compact, auto-insertable standard 8-pin DIP package  
The HCPL-7840 isolation amplifier family was designed  
for current sensing in electronic motor drives. In a typical  
implementation, motor currents flow through an external 0.0002ꢀ V/V/°C gain drift vs. temperature  
resistor and the resulting analog voltage drop is sensed by  
the HCPL-7840. A differential output voltage is created on  
the other side of the HCPL-7840 optical isolation barrier.  
This differential output voltage is proportional to the  
motor current and can be converted to a single-ended  
signal by using an op-amp as shown in the recommended  
application circuit. Since common-mode voltage swings  
of several hundred volts in tens of nanoseconds are  
common in modern switching inverter motor drives, the  
0.3 mV input offset voltage  
100 kHz bandwidth  
0.0045 nonlinearity  
Worldwide safety approval:  
UL 1ꢀ77 (37ꢀ0 Vrms/1 min.)  
and CSA, IEC/EN/DIN EN 60747-ꢀ-2  
Advanced Sigma-Delta (∑-Δ) A/D converter technol-  
ogy  
HCPL-7840 was designed to ignore very high common- Fully differential circuit topology  
mode transient slew rates (of at least 10 kV/μs).  
0.8 μm CMOS IC technology  
The high CMR capability of the HCPL-7840 isolation  
amplifier provides the precision and stability needed to  
accurately monitor motor current in high noise motor  
control environ-ments, providing for smoother control  
(less “torque ripple”) in various types of motor control  
applications.  
Applications  
Motor phase and rail current sensing  
Inverter current sensing  
Switched mode power supply signal isolation  
General purpose current sensing and monitoring  
General purpose analog signal isolation  
The product can also be used for general analog signal  
isolation applications requiring high accuracy, stability,  
and linearity under similarly severe noise con-ditions. For  
general applications, we recommend the HCPL-7840 (gain  
tolerance of ꢀ5). The HCPL-7840 utilizes sigma delta  
(∑-Δ) analog-to-digital converter technology, chopper  
stabilized amplifiers, and a fully differential circuit topol-  
ogy fabricated using Avago’s 0.8 μm CMOS IC process.  
Together, these features deliver unequaled isolation-  
mode noise rejection, as well as excellent offset and gain  
accuracy and stability over time and temperature. This  
performance is delivered in a compact, auto-insertable,  
industry standard 8-pin DIP package that meets world-  
wide regulatory safety standards. (A gull-wing surface  
mount option #300 is also available).  
Functional Diagram  
I
I
DD2  
DD1  
V
8
7
V
V
DD1  
1
2
DD2  
V
+
IN+  
IN–  
OUT+  
+
–
V
3
4
6
5
V
–
OUT–  
GND1  
GND2  
SHIELD  
A 0.1 μF bypass capacitor must be connected  
between pins 1 and 4 and between pins ꢀ and 8.  
CAUTION: It is advised that normal static precautions be taken in handling and assembly  
of this component to prevent damage and/or degradation which may be induced by ESD.  
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