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HCPL-273L PDF预览

HCPL-273L

更新时间: 2024-11-19 12:04:19
品牌 Logo 应用领域
安华高科 - AVAGO 光电输出元件
页数 文件大小 规格书
12页 250K
描述
Low Input Current, High Gain, LVTTL/LVCMOS Compatbie Optocouplers

HCPL-273L 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active包装说明:0.300 INCH, DIP-8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8541.40.80.00Factory Lead Time:17 weeks
风险等级:5.41Is Samacsys:N
其他特性:UL RECOGNIZED配置:SEPARATE, 2 CHANNELS
当前传输比率-最小值:400%最大正向电流:0.012 A
最大绝缘电压:3750 VJESD-609代码:e0
安装特点:THROUGH HOLE MOUNT元件数量:2
最大通态电流:0.06 A最高工作温度:70 °C
最低工作温度:光电设备类型:LOGIC IC OUTPUT OPTOCOUPLER
子类别:Optocoupler - Transistor Outputs最小供电电压:2.7 V
表面贴装:NO端子面层:Tin/Lead (Sn/Pb)
Base Number Matches:1

HCPL-273L 数据手册

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HCPL-270L/070L/273L/073L  
Low Input Current, High Gain, LVTTL/LVCMOS Compatible Optocouplers  
Data Sheet  
Description  
Features  
3.3V/5V Dual Supply Voltages  
These high gain series couplers use a Light Emitting Di-  
ode and an integrated high gain photodetector to pro-  
vide extremely high current transfer ratio between input  
and output. Separate pins for the photodiode and out-  
put stage result in LVTTL compatible saturation voltages  
Low power consumption  
High current transfer ratio  
Low input current requirements – 0.5 mA  
LVTTL/LVCMOS compatible output  
Performance guaranteed over temperature 0°C to +70°C  
Base access allows gain bandwidth adjustment  
High output current – 60 mA  
and high speed operation. Where desired, the V and V  
CC  
O
terminals may be tied together to achieve conventional  
photo-darlington operation. A base access terminal al-  
lows a gain bandwidth adjustment to be made.  
These optocouplers are for use in LVTTL/LVCMOS or  
other low power applications. A 400% minimum current  
transfer ratio is guaranteed over 0 to +70˚C operating  
range for only 0.5 mA of LED current.  
Safety approval, UL, IEC/EN/DIN EN 60747-5-2, CSA  
Applications  
Ground isolate most logic families – LVTTL/LVCMOS  
Low input current line receiver  
High voltage insulation  
The HCPL-070L and HCPL-073L are surface mount de-  
vices packaged in an industry standard SOIC-8 footprint.  
The SOIC-8 does not require "through holes" in a PCB.  
This package occupies approximately one-third the foot-  
print area of the standard dual-in-line package. The lead  
profile is designed to be compatible with standard sur-  
face mount processes.  
EIA RS-232C line receiver  
Telephone ring detector  
V AC line voltage status indicator – low input power  
dissipation  
Low power systems – ground isolation  
Functional Diagram  
HCPL-270L/070L  
HCPL-273L/073L  
8
7
6
5
NC  
ANODE  
CATHODE  
NC  
1
2
3
4
V
V
V
CC  
B
1
2
3
4
8
7
6
5
V
V
V
ANODE  
CATHODE  
CATHODE  
ANODE  
CC  
O1  
O2  
1
1
2
2
O
GND  
GND  
SHIELD  
TRUTH TABLE  
LED  
V
O
ON  
OFF  
LOW  
HIGH  
A 0.1 µF bypass capacitor connected between pins 8 and 5 is recommended.  
CAUTION: It is advised that normal static precautions be taken in handling and assembly  
of this component to prevent damage and/or degradation which may be induced by ESD.  

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