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HCF4033B PDF预览

HCF4033B

更新时间: 2024-02-28 01:09:40
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 显示器计数器输出元件局域网
页数 文件大小 规格书
11页 604K
描述
DECADE COUNTER/DIVIDER WITH DECODED 7-SEGMENT DISPLAY OUTPUT AND RIPPLE BLANKING

HCF4033B 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:not_compliant风险等级:5.92
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
负载/预设输入:YES逻辑集成电路类型:DISPLAY DRIVER COUNTER
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:3/15 V认证状态:Not Qualified
子类别:Counters表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
Base Number Matches:1

HCF4033B 数据手册

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HCF4033B  
DECADE COUNTER/DIVIDER WITH DECODED  
7-SEGMENT DISPLAY OUTPUT AND RIPPLE BLANKING  
COUNTER AND 7-SEGMENT DECODING IN  
ONE PACKAGE  
EASILY INTERFACED WITH 7-SEGMENT  
DISPLAY TYPES  
FULLY STATIC COUNTER OPERATION : DC  
TO 6MHz (Typ.) AT V = 10V  
DD  
DIP  
SOP  
IDEAL FOR LOW POWER DISPLAYS  
RIPPLE BLANKING AND LAMP TEST  
QUIESCENT CURRENT SPECIF. UP TO 20V  
STANDARDIZED SYMMETRICAL OUTPUT  
CHARACTERISTICS  
ORDER CODES  
PACKAGE  
TUBE  
T & R  
INPUT LEAKAGE CURRENT  
DIP  
HCF4033BEY  
HCF4033BM1  
I = 100nA (MAX) AT V = 18V T = 25°C  
SOP  
HCF4033M013TR  
I
DD  
A
100% TESTED FOR QUIESCENT CURRENT  
MEETS ALL REQUIREMENTS OF JEDEC  
JESD13B " STANDARD SPECIFICATIONS  
FOR DESCRIPTION OF B SERIES CMOS  
DEVICES"  
important. This device has CLOCK, RESET,  
CLOCK INHIBIT, RIPPLE BLANKING, LAMP  
TEST input, CARRY OUT, RIPPLE BLANKING  
and 7 DECODED outputs (a to g).  
A high RESET signal clears the decade counter to  
its zero count. The counter is advanced one count  
at the positive clock signal transition if the CLOCK  
INHIBIT signal is low. Counter advancement via  
the clock line is inhibited when the CLOCK  
INHIBIT signal is high. Antilock gating is provided  
on the JOHNSON counter, thus assuring proper  
DESCRIPTION  
The HCF4033B is a monolithic integrated circuit  
fabricated in Metal Oxide Semiconductor  
technology available in DIP and SOP packages.  
The HCF4033B consists of a 5-stages Johnson  
decade counter and an output decoder which  
converts the Johnson code to a 7 segment  
decoded output for driving one stage in a  
numerical display. This device is particularly  
advantageous in display applications where low  
power dissipation and/or low package count are  
counting sequence. The CARRY-OUT (C  
)
OUT  
signal completes one cycle every ten CLOCK  
INPUT cycles and is used to clock the succeeding  
decade directly in a multi-decade counting chain.  
PIN CONNECTION  
September 2001  
1/11  

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