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HCF4032 PDF预览

HCF4032

更新时间: 2024-09-25 23:54:55
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其他 - ETC /
页数 文件大小 规格书
9页 293K
描述
TRIPLE SERIAL ADDERS

HCF4032 数据手册

 浏览型号HCF4032的Datasheet PDF文件第2页浏览型号HCF4032的Datasheet PDF文件第3页浏览型号HCF4032的Datasheet PDF文件第4页浏览型号HCF4032的Datasheet PDF文件第5页浏览型号HCF4032的Datasheet PDF文件第6页浏览型号HCF4032的Datasheet PDF文件第7页 
HCF4032B  
TRIPLE SERIAL ADDER  
INVERT INPUTS ON ALL ADDERS FOR  
SUM COMPLEMENTING APPLICATIONS  
FULLY STATIC OPERATION...DC TO 10MHz  
(Typ.) at V = 10V  
DD  
BUFFERED INPUTS AND OUTPUTS  
SINGLE PHASE CLOCKING  
QUIESCENT CURRENT SPECIFIED UP TO  
20V  
DIP  
SOP  
STANDARDIZED SYMMETRICAL OUTPUT  
CHARACTERISTICS  
INPUT LEAKAGE CURRENT  
ORDER CODES  
PACKAGE  
TUBE  
T & R  
I = 100nA (MAX) AT V = 18V T = 25°C  
100% TESTED FOR QUIESCENT CURRENT  
DIP  
HCF4032BEY  
HCF4032BM1  
I
DD  
A
SOP  
HCF4032M013TR  
MEETS ALL REQUIREMENTS OF JEDEC  
JESD13B " STANDARD SPECIFICATIONS  
FOR DESCRIPTION OF B SERIES CMOS  
DEVICES"  
Data words enter the adder with the least  
significant bit first; the sign bit trails. The output is  
the MOD 2 sum of the input bits plus the carry  
from the previous bit position. The carry is only  
added at the positive going clock transition, thus,  
for spike-free operation the input data transitions  
should occur as soon as possible after the  
triggering edge. The CARRY is reset to a logical  
"0" at the end of each word by applying a logical  
"1" signal to a CARRY-RESET input one bit  
position before the application of the first bit of the  
next word.  
DESCRIPTION  
The HCF4032B is a monolithic integrated circuit  
fabricated in Metal Oxide Semiconductor  
technology available in DIP and SOP packages.  
The HCF4032B consists of three serial adder  
circuits  
with  
common  
CLOCK  
and  
CARRY-RESET inputs. Each adder has two  
provisions for two serial DATA INPUT signals and  
an INVERT command signal. When the command  
signal is a logical "1", the sum is complemented.  
PIN CONNECTION  
September 2001  
1/9  

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