HCF4031BEY

更新时间： 2024-02-20 17:56:56

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		移位寄存器触发器逻辑集成电路光电二极管输出元件
页数	文件大小	规格书
12页	243K
描述
64-STAGE STATIC SHIFT REGISTER

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中文翻译

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技术参数
数据手册

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HCF4031BEY 技术参数

生命周期：	Obsolete	Reach Compliance Code：	compliant
风险等级：	5.84	计数方向：	RIGHT
JESD-30 代码：	R-XDIP-T16	位数：	64
功能数量：	1	端子数量：	16
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	CERAMIC	封装代码：	DIP
封装等效代码：	DIP16,.3	封装形状：	RECTANGULAR
封装形式：	IN-LINE	电源：	3/15 V
认证状态：	Not Qualified	子类别：	Shift Registers
表面贴装：	NO	技术：	CMOS
温度等级：	INDUSTRIAL	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL

HCF4031BEY 数据手册

HCC/HCF4031B

64-STAGE STATIC SHIFT REGISTER

FULLY STATIC OPERATION : DC to 16MHz

(TYP.) @ V_DD– V_SS= 15V

STANDARD TTL DRIVE CAPABILITY ON Q

OUTPUT

RECIRCULATION CAPABILITY

THREE CASCADING MODES :

DIRECT CLOCKING FOR HIGH-SPEED

OPERATION

(Plastic Package)

(Ceramic Package)

DELAYEDCLOCKING FORREDUCED CLOCK

DRIVE REQUIREMENTS

ADDITIONAL 1/2 STAGE FOR SLOW CLOCKS

QUIESCENT CURRENT SPECIFIED TO 20V

FOR HCC DEVICE

STANDARDIZED, SYMMETRICAL OUTPUT

CHARACTERISTICS

5V, 10V, AND 15V PARAMETRIC RATINGS

INPUT CURRENT OF 100nA at 18V AND 25°C

FOR HCC DEVICE

100% TESTED FOR QUIESCENT CURRENT

MEETS ALLREQUIREMENTS OF JEDECTEN-

TATIVE STANDARD N^O. 13A, ”STANDARD

SPECIFICATIONS FOR DESCRIPTION OF ”B”

SERIES CMOS DEVICES”

(Chip Carrier)

ORDER CODES :

HCC4031BF

HCF4031BEY

HCF4031BC1

PIN CONNECTIONS

DESCRIPTION

The HCC4031B (extended temperature range) and

HCF4031B (intermediate temperature range) are

monolithic integrated circuits, available in 16-lead

dual in-line plastic or ceramic package.

The HCC/HCF4031B is a static shift register that

contains 64 D-type, master-slave flip-flop stages

and one stage which is a D-type master flip-flop only

(referred to as a 1/2 stage). The logic level present

at the DATA input is transferred into the first stage

and shifted one stage at each positive-going clock

transition. Maximum clock frequencies up to 16

Megahertz (typical) can be obtained. Because fully

static operation is allowed, information can be per-

manently stored with the clock line in either the low

or high state. The HCC/HCF4031B has a MODE

CONTROL input that, when in thehigh state, allows

operation in the recirculating mode. The MODE

CONTROLinputcan also beused toselectbetween

two separate data sources. Register packages can

be cascaded and the clock lines driven directly for

high-speed operation. Alternatively, a delayed clock

output(CL_D) isprovided that enables cascading reg-

June 1989

1/12

12 3 4 5 6 7...12

中文翻译

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与HCF4031BEY相关器件

型号	品牌	获取价格	描述	数据表
HCF4032	ETC	获取价格	TRIPLE SERIAL ADDERS
HCF4032B	STMICROELECTRONICS	获取价格	TRIPLE SERIAL ADDERS
HCF4032BC1	STMICROELECTRONICS	获取价格	TRIPLE SERIAL ADDERS
HCF4032BEY	STMICROELECTRONICS	获取价格	TRIPLE SERIAL ADDERS
HCF4032BF	STMICROELECTRONICS	获取价格	TRIPLE SERIAL ADDERS
HCF4032BM1	STMICROELECTRONICS	获取价格	TRIPLE SERIAL ADDERS
HCF4032M013TR	STMICROELECTRONICS	获取价格	4000/14000/40000 SERIES, 1-BIT ADDER/SUBTRACTOR, PDSO16, SO-16
HCF4033	ETC	获取价格	DECADE COUNTERS/DIVIDERS WITH DECODED 7 SEGMENT DISPLAY OUTPUTS
HCF4033B	STMICROELECTRONICS	获取价格	DECADE COUNTER/DIVIDER WITH DECODED 7-SEGMENT DISPLAY OUTPUT AND RIPPLE BLANKING
HCF4033BC1	STMICROELECTRONICS	获取价格	7-SEGMENT DISPLAY OUTPUTS DECADE COUNTERS/DIVIDERS WITH DECODED

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