I M A G E S E N S O R
InGaAs linear image sensor
G9201 to G9204 series
Image sensor for DWDM wavelength monitor
G9201 to G9204 series InGaAs linear image sensors are specifically designed as detectors for monitoring WDM in optical communications. These
linear image sensors consist of an InGaAs photodiode array with each pixel connected to a charge amplifier array comprised of CMOS transistors,
a CDS circuit, an offset compensation circuit, a shift register and a timing generator. These sensors deliver high sensitivity and stable operation in
the near infrared spectral range. The package is hermetically sealed for high reliability and the window has an anti-reflective coating for efficient
light detection.
Signal processing circuits on the CMOS chip allow selecting a feedback capacitance (Cf) of 10 pF or 0.5 pF by supplying an external voltage. The
image sensor operates over a wide dynamic range when Cf=10 pF and delivers high gain when Cf=0.5 pF.
Features
Applications
DWDM wavelength monitor
Optical spectrum analyzer
Wide dynamic range
Low noise and low dark current
Selectable gain
Anti-saturation circuit
CDS circuit *1
Accessories (Optional)
InGaAs multichannel detector head C8061-01, C8062-01 *3
Multichannel detector head controller C7557 *3
Offset compensation circuit
Simple operation (by built-in timing generator) *2
High resolution: 25 µm pitch (512 ch)
Low cross-talk
256 ch: 1 video line
512 ch: 2 video lines
ꢀ S election guide
N um ber of
pixels
Pixel pitch
(µm )
Pixel size
[µm (H) × µm (V)]
Spectral response range
(µm )
D efective
pixel
Type N o.
C ooling
G 9201-256R
G 9201-256S
G 9202-512R
G 9202-512S
G 9203-256D *4
G 9203-256R
G 9203-256S
G 9204-512D *4
G 9204-512R
G 9204-512S
N on-cooled
O ne-stage TE-cooled
N on-cooled
0.9 to 1.7 (25 °C )
256
512
50
25
50 × 250
25 × 250
0.9 to 1.67 (-10 °C )
0.9 to 1.7 (25 °C )
0.9 to 1.67 (-10 °C )
O ne-stage TE-cooled
N on-cooled
O ne-stage TE-cooled
N on-cooled
0.9 to 1.7 (25 °C )
0.9 to 1.67 (-10 °C )
0.9 to 1.7 (25 °C )
0.9 to 1.67 (-10 °C )
0
256
512
50
25
50 × 500
25 × 500
O ne-stage TE-cooled
*1: CDS (Correlated Double Sampling) circuit
ꢀꢀSpectral response
(Typ.)
1.0
0.5
0
A major source of noise in charge amplifiers is the reset noise gen-
erated when the integration capacitance is reset. A CDS circuit greatly
reduces this reset noise by holding the signal immediately after re-
set to find the noise differential.
T=25 ˚C
T= -10 ˚C
*2: Timing generator
Different signal timings must be properly set in order to operate a
shift register. In conventional image sensor operation, external PLDs
(Programmable Logic Devices) are used to input the required timing
signals. However, G9201 to G9204 series image sensors internally
generate all timing signals on the CMOS chip just by supplying CLK
and RESET pulses. This makes it simple to set the timings.
*3: G9203-256D and G9204-512D are not available for C7557.
*4: For G9203-256D and G9204-512D specifications, see the separate
data sheets available from Hamamatsu.
0.5
1.0
1.5
2.0
WAVELENGTH (µm)
KMIRB0011EA
1