Datasheet > H50N03J

H50N03J

更新时间： 2024-02-02 02:58:45

品牌	Logo	应用领域
HSMC		/
页数	文件大小	规格书
5页	64K
描述
N-Channel Enhancement-Mode MOSFET (25V, 50A)

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中文翻译

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技术参数
数据手册

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H50N03J 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.81
Is Samacsys：	N	Base Number Matches：	1

H50N03J 数据手册

Spec. No. : MOS200514

Issued Date : 2005.01.01

Revised Date : 2005.10.14

Page No. : 1/5

HI-SINCERITY

MICROELECTRONICS CORP.

H50N03J Pin Assignment

H50N03J

3-Lead Plastic TO-252

Package Code: J

Pin 1: Gate

Pin 2 & Tab: Drain

Pin 3: Source

Tab

N-Channel Enhancement-Mode MOSFET (25V, 50A)

Features

• R_DS(on)=6mΩ@V_GS=10V, I_D=30A

Internal Schematic

Diagram

• R_DS(on)=9mΩ@V_GS=4.5V, I_D=30A

• Advanced trench process technology

• High Density Cell Design for Ultra Low On-Resistance

• Specially Designed for DC/DC Converters and Motor Drivers

• Fully Characterized Avalanche Voltage and Current

• Improved Shoot-Through FOM

Maximum Ratings & Thermal Characteristics

(T_A=25^oC unless otherwise noted)

Parameter

Symbol

Value

Units

Drain-Source Voltage

Gate-Source Voltage

V_DS

V_GS

I_D

±20

Continuous Drain Current

Pulsed Drain Current ^*1

I_DM

350

T_A=25^oC

T_A=75^oC

^oC

Maximum Power Dissipation

P_D

T_J,T_stg

E_AS

Operating Junction and Storage Temperature Range

Avalanche Energy with Single Pulse

-55 to 150

300

I_D=50A, V_DD=25V, L=0.1mH

Junction-to-Case Thermal Resistance

1.8

^OC/W

R_θJC

R_θJA

Junction-to-Ambient Thermal Resistance(PCB mounted)^*2

*1: Maximum DC current limited by the package.

*2: 1-in²2oz Cu PCB board

Switching

Test Circuit

Waveforms

VDD

ton

toff

td(on)

tr td(off)

90%

OUT

90 %

GEN

10%

90%

Output, VOUT

Input, VIN 10%

Inverted

50%

Pulse Width

H50N03J

HSMC Product Specification

12 3 4 5

中文翻译

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