Datasheet > GTLP18T612MEAX_NL

GTLP18T612MEAX_NL

更新时间： 2024-11-21 20:11:03

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		信息通信管理光电二极管逻辑集成电路
页数	文件大小	规格书
10页	104K
描述
Registered Bus Transceiver, GTLP Series, 1-Func, 18-Bit, True Output, BICMOS, PDSO56, 0.300 INCH, MO-118, SSOP-56

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GTLP18T612MEAX_NL 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	SSOP	包装说明：	SSOP, SSOP56,.4
针数：	56	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.39
控制类型：	INDEPENDENT CONTROL	计数方向：	BIDIRECTIONAL
系列：	GTLP	JESD-30 代码：	R-PDSO-G56
长度：	18.415 mm	逻辑集成电路类型：	REGISTERED BUS TRANSCEIVER
最大I（ol）：	0.05 A	位数：	18
功能数量：	1	端口数量：	2
端子数量：	56	最高工作温度：	85 °C
最低工作温度：	-40 °C	输出特性：	OPEN-DRAIN/3-STATE
输出极性：	TRUE	封装主体材料：	PLASTIC/EPOXY
封装代码：	SSOP	封装等效代码：	SSOP56,.4
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, SHRINK PITCH
包装方法：	TAPE AND REEL	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	3.3 V	Prop。Delay @ Nom-Sup：	6.3 ns
传播延迟（tpd）：	6.5 ns	认证状态：	Not Qualified
座面最大高度：	2.74 mm	子类别：	Bus Driver/Transceivers
最大供电电压 (Vsup)：	3.45 V	最小供电电压 (Vsup)：	3.15 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
技术：	BICMOS	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
翻译：	GTLP & LVTTL	触发器类型：	POSITIVE EDGE
宽度：	7.5 mm	Base Number Matches：	1

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May 1999

Revised July 2002

GTLP18T612

18-Bit LVTTL/GTLP Universal Bus Transceiver

General Description

Features

The GTLP18T612 is an 18-bit universal bus transceiver

which provides LVTTL to GTLP signal level translation. It

allows for transparent, latched and clocked modes of data

transfer. The device provides a high speed interface for

cards operating at LVTTL logic levels and a backplane

operating at GTLP logic levels. High speed backplane

operation is a direct result of GTLP’s reduced output swing

(< 1V), reduced input threshold levels and output edge rate

control. The edge rate control minimizes bus settling time.

GTLP is a Fairchild Semiconductor derivative of the Gun-

ning Transistor logic (GTL) JEDEC standard JESD8-3.

■ Bidirectional interface between GTLP and LVTTL logic

levels

■ Designed with edge rate control circuitry to reduce out-

put noise on the GTLP port

■ V_REFpin provides external supply reference voltage for

receiver threshold adjustibility

■ Special PVT compensation circuitry to provide consis-

tent performance over variations of process, supply volt-

age and temperature

■ TTL compatible driver and control inputs

Fairchild’s GTLP has internal edge-rate control and is Pro-

cess, Voltage, and Temperature (PVT) compensated. Its

function is similar to BTL or GTL but with different output

levels and receiver thresholds. GTLP output LOW level is

less than 0.5V, the output HIGH is 1.5V and the receiver

threshold is 1.0V.

■ Designed using Fairchild advanced BiCMOS technology

■ Bushold data inputs on A port to eliminate the need for

external pull-up resistors for unused inputs

■ Power up/down and power off high impedance for live

insertion

■ Open drain on GTLP to support wired-or connection

■ Flow through pinout optimizes PCB layout

■ D-type flip-flop, latch and transparent data paths

■ A Port source/sink −24mA/+24mA

■ B Port sink +50mA

■ Also packaged in plastic Fine-Pitch Ball Grid Array

(FBGA)

Ordering Code:

Order Number

Package Number

Package Description

GTLP18T612G

(Note 1)(Note 2)

BGA54A

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

GTLP18T612MEA

(Note 2)

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

MS56A

MTD56

GTLP18T612MTD

(Note 2)

Note 1: Ordering code “G” indicates Trays.

Note 2: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

DS500169

www.fairchildsemi.com

12 3 4 5 6 7...10

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与GTLP18T612MEAX_NL相关器件

型号	品牌	获取价格	描述	数据表
GTLP18T612MTD	FAIRCHILD	获取价格	18-Bit LVTTL/GTLP Universal Bus Transceiver
GTLP18T612MTD	ROCHESTER	获取价格	GTLP SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, 6.10 MM, MO-153, TSSOP-56
GTLP18T612MTDX	ROCHESTER	获取价格	GTLP SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, 6.10 MM, MO-153, TSSOP-56
GTLP18T612MTDX	FAIRCHILD	获取价格	Registered Bus Transceiver, GTLP Series, 1-Func, 18-Bit, True Output, BICMOS, PDSO56, 6.10
GTLP18T612MTDX_NL	FAIRCHILD	获取价格	Registered Bus Transceiver, GTLP Series, 1-Func, 18-Bit, True Output, BICMOS, PDSO56, 6.10
GTLP1B151	FAIRCHILD	获取价格	1-Bit LVTTL/GTLP Transceiver with Separate LVTTL Port and Feedback Path
GTLP1B151K8X	FAIRCHILD	获取价格	1-Bit LVTTL/GTLP Transceiver with Separate LVTTL Port and Feedback Path
GTLP1B151M	FAIRCHILD	获取价格	1-Bit LVTTL/GTLP Transceiver with Separate LVTTL Port and Feedback Path
GTLP1B151MX	FAIRCHILD	获取价格	1-Bit LVTTL/GTLP Transceiver with Separate LVTTL Port and Feedback Path
GTLP1B153K8X	ETC	获取价格	BUS TRANSCEIVER\|SINGLE\|1-BIT\|BICMOS\|TSSOP\|8PIN\|PLASTIC

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