Datasheet > GS880Z36BGT-225

GS880Z36BGT-225

更新时间： 2024-11-28 07:09:59

品牌	Logo	应用领域
GSI		静态存储器
页数	文件大小	规格书
23页	684K
描述
ZBT SRAM, 256KX36, 6ns, CMOS, PQFP100, TQFP-100

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GS880Z36BGT-225 数据手册

GS880Z18/36BT-250/225/200/166/150/133

100-Pin TQFP

Commercial Temp

Industrial Temp

250 MHz–133 MHz

9Mb Pipelined and Flow Through

2.5 V or 3.3 V V_DD

2.5 V or 3.3 V I/O

Synchronous NBT SRAM

Features

Functional Description

• NBT (No Bus Turn Around) functionality allows zero wait

read-write-read bus utilization; Fully pin-compatible with

both pipelined and flow through NtRAM™, NoBL™ and

ZBT™ SRAMs

The GS880Z18/36BT is a 9Mbit Synchronous Static SRAM.

GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or other

pipelined read/double late write or flow through read/single

late write SRAMs, allow utilization of all available bus

bandwidth by eliminating the need to insert deselect cycles

when the device is switched from read to write cycles.

• 2.5 V or 3.3 V +10%/–10% core power supply

• 2.5 V or 3.3 V I/O supply

• User-configurable Pipeline and Flow Through mode

• LBO pin for Linear or Interleave Burst mode

• Pin compatible with 2M, 4M, and 18M devices

• Byte write operation (9-bit Bytes)

Because it is a synchronous device, address, data inputs, and

read/ write control inputs are captured on the rising edge of the

input clock. Burst order control (LBO) must be tied to a power

rail for proper operation. Asynchronous inputs include the

Sleep mode enable (ZZ) and Output Enable. Output Enable can

be used to override the synchronous control of the output

drivers and turn the RAM's output drivers off at any time.

Write cycles are internally self-timed and initiated by the rising

edge of the clock input. This feature eliminates complex off-

chip write pulse generation required by asynchronous SRAMs

and simplifies input signal timing.

• 3 chip enable signals for easy depth expansion

• ZZ Pin for automatic power-down

• JEDEC-standard 100-lead TQFP package

-250 -225 -200 -166 -150 -133 Unit

Pipeline

3-1-1-1

2.5 2.7 3.0 3.4 3.8 4.0 ns

4.0 4.4 5.0 6.0 6.7 7.5 ns

tCycle

Curr (x18) 280 255 230 200 185 165 mA

Curr (x36) 330 300 270 230 215 190 mA

3.3 V

2.5 V

The GS880Z18/36BT may be configured by the user to

operate in Pipeline or Flow Through mode. Operating as a

pipelined synchronous device, meaning that in addition to the

rising edge triggered registers that capture input signals, the

device incorporates a rising-edge-triggered output register. For

read cycles, pipelined SRAM output data is temporarily stored

by the edge triggered output register during the access cycle

and then released to the output drivers at the next rising edge of

clock.

Curr (x18) 275 250 230 195 180 165 mA

Curr (x36) 320 295 265 225 210 185 mA

Flow

Through

2-1-1-1

5.5 6.0 6.5 7.0 7.5 8.5 ns

tCycle

Curr (x18) 175 165 160 150 145 135 mA

Curr (x36) 200 190 180 170 165 150 mA

3.3 V

2.5 V

Curr (x18) 175 165 160 150 145 135 mA

Curr (x36) 200 190 180 170 165 150 mA

The GS880Z18/36BT is implemented with GSI's high

performance CMOS technology and is available in a JEDEC-

Standard 100-pin TQFP package.

Flow Through and Pipelined NBT SRAM Back-to-Back Read/Write Cycles

Clock

Address

Read/Write

Flow Through

Data I/O

Pipelined

Data I/O

Rev: 1.00b 12/2002

1/23

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

NoBL is a trademark of Cypress Semiconductor Corp.. NtRAM is a trademark of Samsung Electronics Co.. ZBT is a trademark of Integrated Device Technology, Inc.

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与GS880Z36BGT-225相关器件

型号	品牌	获取价格	描述	数据表
GS880Z36BGT-225I	GSI	获取价格	ZBT SRAM, 256KX36, 6ns, CMOS, PQFP100, TQFP-100
GS880Z36BGT-225T	GSI	获取价格	ZBT SRAM, 256KX36, 6ns, CMOS, PQFP100, TQFP-100
GS880Z36BGT-250	GSI	获取价格	9Mb Pipelined and Flow Through Synchronous NBT SRAM
GS880Z36BGT-250	ROCHESTER	获取价格	ZBT SRAM, 256KX36, 5.5ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100
GS880Z36BGT-250I	GSI	获取价格	9Mb Pipelined and Flow Through Synchronous NBT SRAM
GS880Z36BGT-250IT	ROCHESTER	获取价格	ZBT SRAM, 256KX36, 5.5ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100
GS880Z36BGT-250IV	GSI	获取价格	9Mb Pipelined and Flow Through Synchronous NBT SRAM
GS880Z36BGT-250IV	ROCHESTER	获取价格	ZBT SRAM, 256KX36, 5.5ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100
GS880Z36BGT-250IVT	GSI	获取价格	ZBT SRAM, 256KX36, 5.5ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100
GS880Z36BGT-250T	ROCHESTER	获取价格	ZBT SRAM, 256KX36, 5.5ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100

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