Datasheet > 存储 > SRAM> GS8162Z18B-133T

GS8162Z18B-133T

更新时间： 2024-11-05 13:07:59

品牌	Logo	应用领域
GSI		静态存储器
页数	文件大小	规格书
38页	1200K
描述
ZBT SRAM, 1MX18, 8.5ns, CMOS, PBGA119, FBGA-119

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技术参数
数据手册

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GS8162Z18B-133T 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	BGA	包装说明：	BGA, BGA119,7X17,50
针数：	119	Reach Compliance Code：	compliant
ECCN代码：	3A991.B.2.B	HTS代码：	8542.32.00.41
风险等级：	5.68	最长访问时间：	8.5 ns
其他特性：	FLOW-THROUGH OR PIPELINED ARCHITECTURE; ALSO OPERATES AT 3.3V SUPPLY	最大时钟频率 (fCLK)：	133 MHz
I/O 类型：	COMMON	JESD-30 代码：	R-PBGA-B119
JESD-609代码：	e0	长度：	22 mm
内存密度：	18874368 bit	内存集成电路类型：	ZBT SRAM
内存宽度：	18	湿度敏感等级：	3
功能数量：	1	端子数量：	119
字数：	1048576 words	字数代码：	1000000
工作模式：	SYNCHRONOUS	最高工作温度：	70 °C
最低工作温度：		组织：	1MX18
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	BGA	封装等效代码：	BGA119,7X17,50
封装形状：	RECTANGULAR	封装形式：	GRID ARRAY
并行/串行：	PARALLEL	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	2.5,2.5/3.3 V	认证状态：	Not Qualified
座面最大高度：	1.99 mm	最大待机电流：	0.02 A
最小待机电流：	2.38 V	子类别：	SRAMs
最大压摆率：	0.155 mA	最大供电电压 (Vsup)：	2.7 V
最小供电电压 (Vsup)：	2.3 V	标称供电电压 (Vsup)：	2.5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	BALL	端子节距：	1.27 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	14 mm	Base Number Matches：	1

GS8162Z18B-133T 数据手册

GS8162Z18(B/D)/GS8162Z36(B/D)/GS8162Z72(C)

250 MHz–133 MHz 2.5

119, 165, & 209 BGA

Commercial Temp

Industrial Temp

18Mb Pipelined and Flow Through

Synchronous NBT SRAM

V or 3.3 V V

2.5 V or 3.3 V I/O

Because it is a synchronous device, address, data inputs, and

read/write control inputs are captured on the rising edge of the

input clock. Burst order control (LBO) must be tied to a power

rail for proper operation. Asynchronous inputs include the

Sleep mode enable (ZZ) and Output Enable. Output Enable can

be used to override the synchronous control of the output

drivers and turn the RAM's output drivers off at any time.

Write cycles are internally self-timed and initiated by the rising

edge of the clock input. This feature eliminates complex off-

chip write pulse generation required by asynchronous SRAMs

and simplifies input signal timing.

Features

• NBT (No Bus Turn Around) functionality allows zero wait

Read-Write-Read bus utilization; fully pin-compatible with

both pipelined and flow through NtRAM™, NoBL™ and

ZBT™ SRAMs

• 2.5 V or 3.3 V +10%/–10% core power supply

• 2.5 V or 3.3 V I/O supply

• User-configurable Pipeline and Flow Through mode

• ZQ mode pin for user-selectable high/low output drive

• IEEE 1149.1 JTAG-compatible Boundary Scan

• LBO pin for Linear or Interleave Burst mode

• Pin-compatible with 2M, 4M, and 8M devices

• Byte write operation (9-bit Bytes)

The GS8162Z18(B/D)/36(B/D)/72(C) may be configured by

the user to operate in Pipeline or Flow Through mode.

Operating as a pipelined synchronous device, in addition to the

rising-edge-triggered registers that capture input signals, the

device incorporates a rising edge triggered output register. For

read cycles, pipelined SRAM output data is temporarily stored

by the edge-triggered output register during the access cycle

and then released to the output drivers at the next rising edge of

clock.

• 3 chip enable signals for easy depth expansion

• ZZ Pin for automatic power-down

• JEDEC-standard 119-, 165-, or 209-Bump BGA package

Functional Description

The GS8162Z18(B/D)/36(B/D)/72(C) is an 18Mbit

Synchronous Static SRAM. GSI's NBT SRAMs, like ZBT,

NtRAM, NoBL or other pipelined read/double late write or

flow through read/single late write SRAMs, allow utilization

of all available bus bandwidth by eliminating the need to insert

deselect cycles when the device is switched from read to write

cycles.

The GS8162Z18(B/D)/36(B/D)/72(C) is implemented with

GSI's high performance CMOS technology and is available in

a JEDEC-standard 119-bump (x18 & x36), 165-bump (x18 &

x36), or 209-bump (x72) BGA package.

Parameter Synopsis

-250 -225 -200 -166 -150 -133 Unit

Pipeline

3-1-1-1

t_KQ

2.5

4.0

2.7

4.4

3.0

5.0

3.4

6.0

3.8

6.7

4.0

7.5

tCycle

Curr (x18)

Curr (x36)

Curr (x72)

280

330

n/a

255

300

n/a

230

270

350

200

230

300

185 165

215 190

270 245

3.3 V

2.5 V

Curr (x18)

Curr (x36)

Curr (x72)

275

320

n/a

250

295

n/a

230

265

335

195

225

290

180 165

210 185

260 235

Flow

Through

2-1-1-1

t_KQ

5.5

6.0

6.5

7.0

7.5

8.5

tCycle

Curr (x18)

Curr (x36)

Curr (x72)

175

200

n/a

165

190

n/a

160

180

225

150

170

115

145 135

165 150

210 185

3.3 V

2.5 V

Curr (x18)

Curr (x36)

Curr (x72)

175

200

n/a

165

190

n/a

160

180

225

150

170

115

145 135

165 150

210 185

Rev: 2.21 11/2004

1/38

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

12 3 4 5 6 7...38

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与GS8162Z18B-133T相关器件

型号	品牌	获取价格	描述	数据表
GS8162Z18B-150	GSI	获取价格	18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z18B-150I	GSI	获取价格	18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z18B-150IT	GSI	获取价格	ZBT SRAM, 1MX18, 7.5ns, CMOS, PBGA119, FBGA-119
GS8162Z18B-150T	GSI	获取价格	ZBT SRAM, 1MX18, 7.5ns, CMOS, PBGA119, FBGA-119
GS8162Z18B-166	GSI	获取价格	18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z18B-166I	GSI	获取价格	18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z18B-166IT	GSI	获取价格	ZBT SRAM, 1MX18, 7ns, CMOS, PBGA119, FBGA-119
GS8162Z18B-166T	GSI	获取价格	ZBT SRAM, 1MX18, 7ns, CMOS, PBGA119, FBGA-119
GS8162Z18B-200	GSI	获取价格	18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z18B-200I	GSI	获取价格	18Mb Pipelined and Flow Through Synchronous NBT SRAM

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