GS71108ATP/J/SJ/U
6, 8, 10, 12 ns
SOJ, TSOP, FP-BGA
Commercial Temp
Industrial Temp
128K x 8
1Mb Asynchronous SRAM
3.3 V V
DD
Center V and V
DD
SS
SOJ & TSOP-II 128K x 8-Pin Configuration
Features
• Fast access time: 6, 8, 10, 12 ns
• CMOS low power operation: 165/125/100/85 mA at
minimum cycle time
• Single 3.3 V ± 0.3 V power supply
• All inputs and outputs are TTL-compatible
• Fully static operation
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
A3
A4
2
A2
A5
3
A1
A6
4
A0
A7
5
CE
DQ1
DQ2
OE
DQ8
DQ7
32-pin
400 mil SOJ
&
6
• Industrial Temperature Option: –40° to 85°C
• Package line up
7
8
V
V
V
V
DD
SS
SS
J: 400 mil, 32-pin SOJ package
TP: 400 mil, 32-pin TSOP Type II package
SJ: 300 mil, 32-pin SOJ package
9
DD
300 mil SOJ
&
10
11
12
13
14
15
16
DQ3
DQ4
WE
A16
A15
A14
A13
DQ6
DQ5
A8
U: 6 mm x 8 mm Fine Pitch Ball Grid Array package
400 mil TSOP II
A9
Description
A10
A11
A12
The GS71108A is a high speed CMOS Static RAM organized
as 131,072 words by 8 bits. Static design eliminates the need
for external clocks or timing strobes. The GS operates on a
single 3.3 V power supply and all inputs and outputs are TTL-
compatible. The GS71108A is available in a 6 mm x 8 mm
Fine Pitch BGA package, as well as in 300 mil and 400 mil
SOJ and 400 mil TSOP Type-II packages.
Packages J, TP, and SJ
Fine Pitch BGA 128K x 8-Bump Configuration
1
2
3
4
5
6
A
B
C
D
NC
OE
A2
A1
A0
NC
A6
A5
A4
A3
A7
CE
NC
DQ8
Pin Descriptions
DQ1 NC
DQ2 NC
Symbol
A0–A16
DQ1–DQ8
CE
Description
Address input
NC DQ7
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3 V power supply
VSS
VDD
VDD
VSS
NC
NC
NC
NC
E
F
NC
A14
A15
A16
NC
WE
DQ3 NC
DQ4 NC
A11 DQ5 DQ6
OE
VDD
G
H
A12
A13
WE
A9
A8
VSS
NC
Ground
NC
A10
NC
No connect
Package U
6 mm x 8 mm, 0.75 mm Bump Pitch
Top View
Rev: 1.02 10/2001
1/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.