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GP4020/IGGQ1N

更新时间： 2024-11-12 22:06:07
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 接收机全球定位系统
页数 文件大小 规格书
17页 209K
描述
GPS Receiver Baseband Processor

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GP4020/IGGQ1N 数据手册

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GP4020  
GPS Receiver Baseband Processor  
DS5134  
ISSUE 4.4  
May 2002  
Features  
Ordering Information  
• Complete GPS correlator and Firefly MF1  
microcontroller core  
GP4020/IG/GQ1N (trays)  
GP4020/IG/GQ1Q (tape and reel, 1000 units per reel)  
• ARM 7TDMITM (Thumb®) Microprocessor, with JTAG  
ICEBreakerTM Debug Interface  
The GP4020 is available in a 100 pin PQFP package in  
Industrial (-40°C to +85°C) grade. The ordering code is  
standard for screened devices  
• Fully Configurable External Data Bus  
• 12 Fully Independent Correlation Channels  
• Low Voltage Operation: 3·3V  
• Low Current Power–Down Mode  
• 1PPS UTC Aligned Timing Output  
• Dual UART  
• 3-wire BµILD Serial Input/Output (BSIO) Interface  
• 8 General Purpose Input/Output (GPIO) Lines  
• Boot ROM, allowing Software Upload via UART  
• 8K Bytes Internal SRAM  
Description  
The GP4020 is a complete digital baseband processor  
for a Global Positioning System (GPS) receiver. It  
combines the 12-channel correlator function of the  
GP2021 with an advanced ARM7TDMI (Thumb)  
microprocessor to achieve a higher level of integration,  
reduced system cost, reduced power consumption and  
added functionality. The GP4020 complements the  
GP2015 and GP2010 C/A code RF downconverters  
available from Zarlink Semiconductor.  
• Compatible with GP2015 and GP2010 RF Front Ends  
Applications  
• GPS Navigation Systems  
• GPS Geodetic Receivers  
• Time Transfer Receivers  
• Automatic Vehicle Location (AVL)  
• E911 Emergency Positioning  
The correlator section contains 12 identical tracking  
module blocks, one for each channel. Each channel  
contains all the components necessary for acquiring  
and tracking the received signal, and also contains  
other functional blocks, which are used to produce part  
of the measurement data set. Individual channels may  
be deactivated for systems not requiring full 12-channel  
operation and thus allowing for reduced power  
consumption and processor loading.  
Related Products  
Part  
Description  
Data sheet  
GP2015  
DS4374  
GPSReceiverRFFrontEnd  
(TQFP 48 package)  
The microprocessor section contains the Firefly MF1  
microcontroller core, which includes an ARM7TDMI  
with a Thumb instruction de-compressor plus the Firefly  
BµILD module. Also included are a second UART,  
BµILD Serial I/O, General I/O and Watchdog functions.  
GP2010  
DS4056  
GPSReceiverRFFrontEnd  
(PQFP 44 package)  
Absolute Maximum Ratings  
Supply voltage (VDD) from ground (GND)  
Bias for 5V inputs  
-0·5V to +5·0V  
+7·0V max.  
Input voltage (any input pin)  
Output voltage (any output pin)  
Storage temperature  
GND-0·5V to VDD+0·5V  
GND-0·5V to VDD+0·5V  
-55°C to +150°C  
2kV  
Static discharge (HBM)*  
*Mil Std 883 Human Body Model = discharge from 100pF through  
1500Ω between any 2 pins  
Manufactured under licence from ARM Ltd  
ARM and the ARM logo are trademarks of Advanced RISC Machines Ltd  
1234567...17

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