Datasheet > GM71S65403C(CL)

GM71S65403C(CL)

更新时间： 2022-01-19 18:38:00

品牌	Logo	应用领域
其他 - ETC		动态存储器
页数	文件大小	规格书
11页	107K
描述
16Mx4\|3.3V\|4K\|5/6\|FP/EDO DRAM - 64M

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GM71S65403C(CL) 数据手册

GM71V65403C

GM71VS65403CL

16,777,216 WORDS x 4 BIT

CMOS DYNAMIC RAM

Description

Pin Configuration

32 SOJ / TSOP II

The GM71V(S)65403C/CL is the new generation

dynamic RAM organized 16,777,216 words by 4bits.

The GM71V(S)65403C/CL utilizes advanced CMOS

Silicon Gate Process Technology as well as

advanced circuit techniques for wide operating

margins, both internally and to the system user.

System oriented features include single power supply

of 3.3V+/-10% tolerance, direct interfacing

capability with high performance logic families such

as Schottky TTL.

31 IO3

VSS

VCC

IO0

IO1

IO2

VSS

VCC

/CAS

The GM71V(S)65403C/CL offers Extended Data

Out(EDO) Mode as a high speed access mode.

/OE

/WE

/RAS

24 NC

23 A11

22 A10

Features

* 16,777,216 Words x 4 Bit

* Extended Data Out (EDO) Mode Capability

* Fast Access Time & Cycle Time

(Unit: ns)

tRAC

tAA

tCAC

tRC

tHPC

GM71V(S)65403C/CL-5

GM71V(S)65403C/CL-6

17 VSS

VCC

104

(Top View)

*Power dissipation

- Active : 504mW/468mW(MAX)

- Standby : 1.8 mW ( CMOS level : MAX )

0.54mW ( L-Version : MAX)

*EDO page mode capability

*Access time : 50ns/60ns (max)

*Refresh cycles

- RAS only Refresh

4096 cycles/64 ms (GM71V65403C)

4096 cycles/128ms (GM71VS65403CL)(L_Version)

*CBR & Hidden Refresh

4096 cycles/64 ms (GM71V65403C)

4096 cycles/128 ms (GM71VS65403CL)( L-Version )

*4 variations of refresh

-RAS-only refresh

-CAS-before-RAS refresh

-Hidden refresh

-Self refresh (L-Version)

*Single Power Supply of 3.3V+/-10 % with a built-in VBB generator

*Battery Back Up Operation ( L-Version )

Rev 0.1 / Apr’01

12 3 4 5 6 7...11

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