Datasheet > GM71S65400C(CL)

GM71S65400C(CL)

更新时间： 2022-01-19 18:38:00

品牌	Logo	应用领域
其他 - ETC		动态存储器
页数	文件大小	规格书
9页	93K
描述
16Mx4\|3.3V\|4K\|5/6\|FP/EDO DRAM - 64M

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GM71S65400C(CL) 数据手册

GM71V65400C

16,777,216 WORDS x 4 BIT

CMOS DYNAMIC RAM

Description

Pin Configuration

32 SOJ / TSOP II

The GM71V65400C is the second generation

dynamic RAM organized 16,777,216 words by 4

bits. The GM71V65400C utilizes 0.35um

CMOS Silicon Gate Process Technology as well

as advanced circuit techniques for wide

operating margins, both internally and to the

system user. System oriented features include

single power supply of 3.3V¡ 0¾.3V tolerance,

direct interfacing capability with high

performance logic families such as Schottky

TTL.

I/O3

I/O2

I/O0

I/O1

CAS

The GM71V65400C offers Fast Page Mode as

a high speed access mode.

RAS

A11

A10

Features

• 16,777,216 Words x 4 Bit

• Fast Page Mode Capability

• Fast Access Time & Cycle Time

(Unit: ns)

tRAC

tAA

tCAC

tRC

tPC

(Top View)

110

130

GM71V65400C-5

GM71V65400C-6

GM71V65400C-7

• Low Power

- Active : 432 mW / 396 mW / 360 mW (MAX)

- Standby : 3.6 mW ( CMOS level :MAX )

• RAS Only Refresh, CAS before RAS Refresh,

Hidden Refresh Capability

• LVTTL

• 4096 Refresh Cycles/64 ms

• Single Power Supply of 3.3V¡ 0¾.3V

with a built-in VBB generator

Rev 0.1 / Apr’01

* This Data Sheet is subject to change without notice.

12 3 4 5 6 7...9

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